Patents by Inventor Fen Hu

Fen Hu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240133890
    Abstract: The present disclosure provides the use of BAZ1B_K426hy in the preparation of a product for tumor detection and belongs to the field of biotechnology. The present disclosure further provides a group of immunogenic polypeptides, including polypeptide A and polypeptide B. An anti-BAZ1B_K426hy polyclonal antibody is prepared by conducting mixed immunization on an animal with the immunogenic polypeptide. The polyclonal antibody can specifically recognize an endogenous protein BAZ1B_K426hy by enzyme-linked immunosorbent assay (ELISA)/Dot blot/Western blot, which is used for preparation of detection products for tumors and Williams syndrome.
    Type: Application
    Filed: April 13, 2023
    Publication date: April 25, 2024
    Applicants: Tangshan People's Hospital, North China University of Science and Technology, Tangshan Maternal And Child Health Hospital
    Inventors: Jingwu LI, Yufeng Li, Shuqing Wang, Jinghua Zhang, Jinghua Wu, Fen Hu, Yuan Yu, Yan Liu, Yuhui Li, Xuan Zheng
  • Patent number: 11967958
    Abstract: In some embodiments, digital logic components, such as those found in standard cells in integrated circuit devices, are used to synthesize signals with controllable waveforms that result in transmitted signals that meet certain requirements, such as above-threshold high openings and below-threshold over/under-shooting. In some embodiments, driving buffers with logic controls and delay chains are used to achieve controllable slew rates at rising and falling edges to minimize over/under shooting behavior in signals. In some embodiments, control logic and delay chains produce controllable rising/falling “stair-type” edges to obtain optimized damping waveform.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: April 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Huan-Neng Chen, Chang-Fen Hu, Shao-Yu Li
  • Patent number: 11966241
    Abstract: A circuit includes a voltage divider circuit configured to generate a feedback voltage according to an output voltage, an operational amplifier configured to output a driving signal according to the feedback voltage and a reference voltage and a pass gate circuit including multiple current paths. The current paths are controlled by the driving signal and connected in parallel between the voltage divider circuit and a power reference node.
    Type: Grant
    Filed: February 11, 2022
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Huan-Neng Chen, Yen-Lin Liu, Chia-Wei Hsu, Jo-Yu Wu, Chang-Fen Hu, Shao-Yu Li, Bo-Ting Chen
  • Publication number: 20230238380
    Abstract: A circuit structure is provided. The circuit structure may include a first die area including an output gate, a second die area including a circuit and an input gate and a die-to-die interconnect. The input gate may include a transistor. The circuit may be connected between the die-to-die interconnect and a gate region of the transistor. The circuit may include a MOS transistor. A first source/drain region of the MOS transistor may be connected to the die-to-die interconnect.
    Type: Application
    Filed: March 27, 2023
    Publication date: July 27, 2023
    Inventors: CHANG-FEN HU, SHAO-YU LI, KUO-JI CHEN, CHIH-PENG LIN, CHUEI-TANG WANG, CHING-FANG CHEN
  • Patent number: 11646313
    Abstract: A circuit structure is provided. The circuit structure may include a first die area including an output gate, a second die area including a circuit and an input gate and a die-to-die interconnect. The input gate may include a transistor. The circuit may be connected between the die-to-die interconnect and a gate region of the transistor. The circuit may include a PMOS transistor and an NMOS transistor. A first source/drain region of the PMOS transistor may be connected to a first source/drain region of the NMOS transistor and the die-to-die interconnect.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: May 9, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chang-Fen Hu, Shao-Yu Li, Kuo-Ji Chen, Chih-Peng Lin, Chuei-Tang Wang, Ching-Fang Chen
  • Publication number: 20230009027
    Abstract: A circuit includes a voltage divider circuit configured to generate a feedback voltage according to an output voltage, an operational amplifier configured to output a driving signal according to the feedback voltage and a reference voltage and a pass gate circuit including multiple current paths. The current paths are controlled by the driving signal and connected in parallel between the voltage divider circuit and a power reference node.
    Type: Application
    Filed: February 11, 2022
    Publication date: January 12, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Huan-Neng Chen, Yen-Lin LIU, Chia-Wei Hsu, Jo-Yu Wu, CHANG-FEN HU, Shao-Yu Li, Bo-Ting Chen
  • Publication number: 20220352880
    Abstract: In some embodiments, digital logic components, such as those found in standard cells in integrated circuit devices, are used to synthesize signals with controllable waveforms that result in transmitted signals that meet certain requirements, such as above-threshold high openings and below-threshold over/under-shooting. In some embodiments, driving buffers with logic controls and delay chains are used to achieve controllable slew rates at rising and falling edges to minimize over/under shooting behavior in signals. In some embodiments, control logic and delay chains produce controllable rising/falling “stair-type” edges to obtain optimized damping waveform.
    Type: Application
    Filed: November 30, 2021
    Publication date: November 3, 2022
    Inventors: Huan-Neng Chen, Chang-Fen Hu, Shao-Yu Li
  • Publication number: 20220293597
    Abstract: A circuit structure is provided. The circuit structure may include a first die area including an output gate, a second die area including a circuit and an input gate and a die-to-die interconnect. The input gate may include a transistor. The circuit may be connected between the die-to-die interconnect and a gate region of the transistor. The circuit may include a PMOS transistor and an NMOS transistor. A first source/drain region of the PMOS transistor may be connected to a first source/drain region of the NMOS transistor and the die-to-die interconnect.
    Type: Application
    Filed: June 24, 2021
    Publication date: September 15, 2022
    Inventors: CHANG-FEN HU, SHAO-YU LI, KUO-JI CHEN, CHIH-PENG LIN, CHUEI-TANG WANG, CHING-FANG CHEN
  • Patent number: 10990573
    Abstract: A fast index creation system for a cloud big data database electrically and communicatively coupled to a cloud non-relational database for inquiring and creating an index includes an application exchange module, a data exchange module, a first processing module, a second processing module and an integrated processing module. The application exchange module receives a query string inputted by a user and prompts a result index table. The data exchange module has a temporary index table. The first processing module computes the query string and generates a query instruction to compute a temporary index table for comparison and check if there is any data matched with the query instruction. If yes, then the first processing module will generate a cache index table, or else the first module will generate a create instruction provided for the second processing module to compute a non-relational database and generate a new index table.
    Type: Grant
    Filed: January 16, 2019
    Date of Patent: April 27, 2021
    Assignee: SYSCOM COMPUTER ENGINEERING CO.
    Inventors: Chen-Yu Yen, Pei-Fen Hu, Shu-Yuan Hu, Kun-Ting Chiu
  • Patent number: 10804435
    Abstract: A light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer emitting an UV light, formed between the first semiconductor layer and the second semiconductor layer; a first transparent conductive layer formed on the second semiconductor layer, the first transparent conductive layer including metal oxide; and a second transparent conductive layer formed on the first transparent conductive layer, the second transparent conductive layer including graphene, wherein the first transparent conductive layer is continuously formed over a top surface of the second semiconductor layer, the first transparent conductive layer comprises a thickness smaller than 10 nm.
    Type: Grant
    Filed: August 25, 2017
    Date of Patent: October 13, 2020
    Assignee: EPISTAR CORPORATION
    Inventors: Chang-Tai Hisao, I-Lun Ma, Hao-Yu Chen, Shu-Fen Hu, Ru-Shi Liu, Chih-Ming Wang, Chun-Yuan Chen, Yih-Hua Renn, Chien-Hsin Wang, Yung-Hsiang Lin
  • Publication number: 20200226116
    Abstract: A fast index creation system for a cloud big data database electrically and communicatively coupled to a cloud non-relational database for inquiring and creating an index includes an application exchange module, a data exchange module, a first processing module, a second processing module and an integrated processing module. The application exchange module receives a query string inputted by a user and prompts a result index table. The data exchange module has a temporary index table. The first processing module computes the query string and generates a query instruction to compute a temporary index table for comparison and check if there is any data matched with the query instruction. If yes, then the first processing module will generate a cache index table, or else the first module will generate a create instruction provided for the second processing module to compute a non-relational database and generate a new index table.
    Type: Application
    Filed: January 16, 2019
    Publication date: July 16, 2020
    Inventors: CHEN-YU YEN, PEI-FEN HU, SHU-YUAN HU, KUN-TING CHIU
  • Patent number: 10683454
    Abstract: The present invention relates to a phosphor, a method for preparing the phosphor, an optoelectronic component, and a method for producing the optoelectronic component. The phosphor has the following general formula: La3(1?x)Ga1?yGe5(1?z)O16: 3xA3+, yCr3+, 5zB4+, where x, y, and z do not equal to 0 simultaneously; A represents at least one of Gd and Yb; B represents at least one of Sn, Nb, and Ta. For the phosphor, its emission spectrum is within a red visible light region and a near-infrared region when excited by blue visible light, purple visible light or ultraviolet light; and it has a wide reflection spectrum and a high radiant flux. Therefore, it can be used in optoelectronic components such as LEDs to meet requirements of current medical testing, food composition analysis, security cameras, iris/facial recognition, virtual reality, gaming notebook and light detection and ranging applications.
    Type: Grant
    Filed: October 19, 2018
    Date of Patent: June 16, 2020
    Assignee: Everlight Electronics Co., Ltd.
    Inventors: Veeramani Rajendran, Mu-Huai Fang, Ru-Shi Liu, Ho Chang, Kuang-Mao Lu, Yan-Shen Lin, Chieh-Yu Kang, Gabriel Nicolo A. De Guzman, Shu-Fen Hu
  • Publication number: 20190194539
    Abstract: The present invention relates to a phosphor, a method for preparing the phosphor, an optoelectronic component, and a method for producing the optoelectronic component. The phosphor has the following general formula: La3(1?x)Ga1?yGe5(1?z)O16: 3xA3+, yCr3+, 5zB4+, where x, y, and z do not equal to 0 simultaneously; A represents at least one of Gd and Yb; B represents at least one of Sn, Nb, and Ta. For the phosphor, its emission spectrum is within a red visible light region and a near-infrared region when excited by blue visible light, purple visible light or ultraviolet light; and it has a wide reflection spectrum and a high radiant flux. Therefore, it can be used in optoelectronic components such as LEDs to meet requirements of current medical testing, food composition analysis, security cameras, iris/facial recognition, virtual reality, gaming notebook and light detection and ranging applications.
    Type: Application
    Filed: October 19, 2018
    Publication date: June 27, 2019
    Applicant: Everlight Electronics Co., Ltd.
    Inventors: Veeramani Rajendran, Mu-Huai Fang, Ru-Shi Liu, Ho Chang, Kuang-Mao Lu, Yan-Shen Lin, Chieh-Yu Kang, Gabriel Nicolo A. De Guzman, Shu-Fen Hu
  • Publication number: 20180232406
    Abstract: A big data database system created in a language structure of a SQL database and a language structure of a NoSQL database is provided for accessing data after clients have requested for a connection, and the system includes at least one transfer server and a data host, and the transfer server has a plurality of queuing devices and an assigner, and the queuing devices are telecommunicatively coupled to the clients respectively, and the assigner is telecommunicatively coupled to the queuing devices and the data host. When the clients send out a data request, the respective queuing device receives and queues the data request, and the assigner sends the data request to the data host through a single connection between the transfer server and the data host. Therefore, the connection load of the data host of a terminal is reduced to improve the overall system operation performance.
    Type: Application
    Filed: February 13, 2017
    Publication date: August 16, 2018
    Inventors: TZE-JEN YU, KUN-TING CHIU, SHU-YUAN HU, PEI-FEN HU
  • Publication number: 20180062043
    Abstract: A light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer emitting an UV light, formed between the first semiconductor layer and the second semiconductor layer; a first transparent conductive layer formed on the second semiconductor layer, the first transparent conductive layer including metal oxide; and a second transparent conductive layer formed on the first transparent conductive layer, the second transparent conductive layer including graphene, wherein the first transparent conductive layer is continuously formed over a top surface of the second semiconductor layer, the first transparent conductive layer comprises a thickness smaller than 10 nm.
    Type: Application
    Filed: August 25, 2017
    Publication date: March 1, 2018
    Inventors: Chang-Tai HISAO, I-Lun MA, Hao-Yu CHEN, Shu-Fen HU, Ru-Shi LIU, Chih-Ming WANG, Chun-Yuan CHEN, Yih-Hua RENN, Chien-Hsin WANG, Yung-Hsiang LIN
  • Patent number: 9497976
    Abstract: A method for improving frozen fish fillets treated by way of a salt-water immersion process includes the following steps: pretreating raw fish to obtain fish fillets; precooling the fish fillets; stacking the precooled fish fillets to obtain a fish fillet stack; freezing the fish fillet stack by using a salt-water immersion process, and performing power-variable ultrasonic wave treatment; and feeding the fish fillets into a cold storage, and performing freezing storage at minus 18 degrees centigrade. The power-variable ultrasonic wave treatment includes: firstly treating for 5 to 10 min under the power of 800 to 600 W, and then changing the power to 200 to 600 W for treating for 5 to 15 min. The freezing time of fish flesh is shortened, and formed ice crystals are fine and uniform, thereby preventing the damage of the formed ice crystals to cell walls.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: November 22, 2016
    Assignee: SOUTH CHINA UNIVERSITY OF TECHNOLOGY
    Inventors: Dawen Sun, Fen Hu, Xin'an Zeng, Qijun Wang, Wenhong Gao
  • Publication number: 20160050945
    Abstract: A method for improving frozen fish fillets treated by way of a salt-water immersion process includes the following steps: pretreating raw fish to obtain fish fillets; precooling the fish fillets; stacking the precooled fish fillets to obtain a fish fillet stack; freezing the fish fillet stack by using a salt-water immersion process, and performing power-variable ultrasonic wave treatment; and feeding the fish fillets into a cold storage, and performing freezing storage at minus 18 degrees centigrade. The power-variable ultrasonic wave treatment includes: firstly treating for 5 to 10 min under the power of 800 to 600 W, and then changing the power to 200 to 600 W for treating for 5 to 15 min. The freezing time of fish flesh is shortened, and formed ice crystals are fine and uniform, thereby preventing the damage of the formed ice crystals to cell walls.
    Type: Application
    Filed: December 20, 2013
    Publication date: February 25, 2016
    Inventors: Dawen SUN, Fen HU, Xin'an ZENG, Qijun WANG, Wenhong GAO
  • Publication number: 20150294799
    Abstract: Disclosed are an electrode for an energy storage device and an energy storage device using the same. The electrode for an energy storage device comprises a porous electrical conductive material and a plurality of Co—Mn composite oxide nanowires on the porous electrical conductive material. The energy storage device comprises an anode comprising the aforementioned electrode; a cathode; and an electrolyte between the anode and the cathode.
    Type: Application
    Filed: April 15, 2014
    Publication date: October 15, 2015
    Applicant: EPISTAR CORPORATION
    Inventors: Saad MOHAMED, Chih-Jung CHEN, Ru-Shi LlU, Shu-Fen HU, Hsin-Mao LlU, Ai-Sen LlU
  • Patent number: D868510
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: December 3, 2019
    Inventor: Fen Hu
  • Patent number: D893189
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: August 18, 2020
    Inventor: Fen Hu