Abstract: Systems and apparatuses are disclosed that enable ultrathin keyboards and the storing keys of an associated physical keyboard to a storage position. The systems comprise a keycap, a keyswitch mechanism coupled to the keycap, a translatable base frame and a spring mechanism to bias the keycap into an operating position. The biasing mechanism may be an arch-shaped spring mechanism or a magnetic biasing mechanism. A portion of the biasing mechanism may be coupled to the base frame. The base frame is translatable between a first position in which the biasing mechanism imparts a force to bias the keycap into the operating position and a second position in which the portion of the biasing mechanism is repositioned such that the force to bias the keycap is at least partially eliminated. A control member may be provided to translate natural user movement into movement of the base frame for collapsing the keyboard.

Abstract: Some implementations provide techniques and arrangements to receive image information. A plurality of reference fields of a user-manipulated device may be identified. Each reference field of the plurality of reference fields may include reference elements. The plurality of reference fields may be identified based on colors of the reference elements, shapes of the reference elements, and/or a pattern of the reference elements. Some implementations may generate position information based on the plurality of reference fields. The position information may identify a position of the user-manipulated device relative to the video camera. Some implementations may provide the position information to an application.

Abstract: Accelerator systems and methods are disclosed that utilize FPGA technology to achieve better parallelism and flexibility. The accelerator system may be used to implement a relevance-ranking algorithm, such as RankBoost, for a training process. The algorithm and related data structures may be organized to enable streaming data access and, thus, increase the training speed. The data may be compressed to enable the system and method to be operable with larger data sets. At least a portion of the approximated RankBoost algorithm may be implemented as a single instruction multiple data streams (SIMD) architecture with multiple processing engines (PEs) in the FPGA. Thus, large data sets can be loaded on memories associated with an FPGA to increase the speed of the relevance ranking algorithm.

Abstract: Architecture that performs incremental computing for web searches by employing methods at least for storing the results of repeat queries on unchanged webpages and for computing results for the repeated queries. The architecture includes one or more algorithms for pre-computing query results on index servers, for only selectively choosing index servers whose result for a query change for a query computation process, and for re-using the unchanged web pages stored in the cache and computing results upon changed index and unchanged index separately.

Abstract: Technologies pertaining to computing depth images of a scene that includes a mobile object based upon the principle of light falloff are described herein. An infrared image of a scene that includes a mobile object is captured, wherein the infrared image has a plurality of pixels having a respective plurality of intensity values. A depth image for the scene is computed based at least in part upon square roots of respective intensity values in the infrared image.

Abstract: Methods, computer systems, and computer-readable media for accelerating a learning-to-rank algorithm using a central processing unit (CPU) and a graphics processing unit (GPU) are provided. The GPU processes document pairs created by the CPU in parallel to generate a lambda-gradient value and a weight for each document. The CPU builds a regression tree for the documents. The GPU is utilized to accelerate this process by constructing histograms of feature values, wherein the address of bins collecting the same feature value are shifted during the construction of the histogram. The output of the regression tree is a score for each document which is used to rank or order the document on a search engine results page.

Abstract: Architecture that performs incremental computing for web searches by employing methods at least for storing the results of repeat queries on unchanged webpages and for computing results for the repeated queries. The architecture includes one or more algorithms for pre-computing query results on index servers, for only selectively choosing index servers whose result for a query change for a query computation process, and for re-using the unchanged web pages stored in the cache and computing results upon changed index and unchanged index separately.

Abstract: A method using a RankBoost-based algorithm to automatically select features for further ranking model training is provided. The method reiteratively applies a set of ranking candidates to a training data set comprising a plurality of ranking objects having a known pairwise ranking order. Each round of iteration applies a weight distribution of ranking object pairs, yields a ranking result by each ranking candidate, identifies a favored ranking candidate for the round based on the ranking results, and updates the weight distribution to be used in next iteration round by increasing weights of ranking object pairs that are poorly ranked by the favored ranking candidate. The method then infers a target feature set from the favored ranking candidates identified in the iterations.

Abstract: In general, a “Flexible Mobile Display,” as described herein, provides various techniques for implementing a flexible display for mobile phones or other handheld or portable electronic or computing devices that, in various embodiments, is foldable and/or rollable. Consequently, the Flexible Mobile Display provides a large display in a small form factor that is user extensible. Advantageously, production of the Flexible Mobile Display uses an adaptation of various currently available production techniques and is expected to be relatively low cost to produce. Additionally, in various embodiments, the Flexible Mobile Display also includes a low cost touch or multi-touch sensing mechanism that can be easily integrated into the overall system.

Abstract: Motion-based control of an electronic device uses an array of at least three reference elements forming a triangle. An image sensor (e.g., a video camera), which may be located on a user-manipulated device, captures an image of the array. The array image has a pattern formed by a nonparallel projection of the reference triangle onto the image sensor. The pattern carries information of the relative position between the image sensor and the reference element array, and changes as the relative position changes. The pattern is identified and used for generating position information, which may express a multidimensional position of the user-manipulated device with respect to three axes describing a translational position, and three rotational axes describing pitch, roll and yaw motions. The control system and method are particularly suitable for videogames.

Abstract: Systems, methods, and devices are described for implementing learning algorithms on data sets. A data set may be partitioned into a plurality of data partitions that may be distributed to two or more processors, such as a graphics processing unit. The data partitions may be processed in parallel by each of the processors to determine local counts associated with the data partitions. The local counts may then be aggregated to form a global count that reflects the local counts for the data set. The partitioning may be performed by a data partition algorithm and the processing and the aggregating may be performed by a parallel collapsed Gibbs sampling (CGS) algorithm and/or a parallel collapsed variational Bayesian (CVB) algorithm. In addition, the CGS and/or the CVB algorithms may be associated with the data partition algorithm and may be parallelized to train a latent Dirichlet allocation model.

Abstract: Architecture for decoding (demosaicing) a source image and performing reconstruction directly from the Bayer pattern to reduce memory size and improve communication bandwidth. The architecture can be easily implemented in hardware such as in field programmable gate arrays (FPGAs) and application-specific integrated circuits (ASICs).

Abstract: Accelerator systems and methods are disclosed that utilize FPGA technology to achieve better parallelism and flexibility. The accelerator system may be used to implement a relevance-ranking algorithm, such as RankBoost, for a training process. The algorithm and related data structures may be organized to enable streaming data access and, thus, increase the training speed. The data may be compressed to enable the system and method to be operable with larger data sets. At least a portion of the approximated RankBoost algorithm may be implemented as a single instruction multiple data streams (SIMD) architecture with multiple processing engines (PEs) in the FPGA. Thus, large data sets can be loaded on memories associated with an FPGA to increase the speed of the relevance ranking algorithm.

Abstract: Accelerator systems and methods are disclosed that utilize FPGA technology to achieve better parallelism and processing speed. A Field Programmable Gate Array (FPGA) is configured to have a hardware logic performing computations associated with a neural network training algorithm, especially a Web relevance ranking algorithm such as LambaRank. The training data is first processed and organized by a host computing device, and then streamed to the FPGA for direct access by the FPGA to perform high-bandwidth computation with increased training speed. Thus, large data sets such as that related to Web relevance ranking can be processed. The FPGA may include a processing element performing computations of a hidden layer of the neural network training algorithm. Parallel computing may be realized using a single instruction multiple data streams (SIMD) architecture with multiple arithmetic logic units in the FPGA.

Abstract: Accelerator systems and methods are disclosed that utilize FPGA technology to achieve better parallelism and flexibility. The accelerator system may be used to implement a relevance-ranking algorithm, such as RankBoost, for a training process. The algorithm and related data structures may be organized to enable streaming data access and, thus, increase the training speed. The data may be compressed to enable the system and method to be operable with larger data sets. At least a portion of the approximated RankBoost algorithm may be implemented as a single instruction multiple data streams (SIMD) architecture with multiple processing engines (PEs) in the FPGA. Thus, large data sets can be loaded on memories associated with an FPGA to increase the speed of the relevance ranking algorithm.

Abstract: Display components (e.g., liquid crystal displays (LCDs)) are viewable at different viewing angles, such as by a first user positioned directly in front of the display and by a second user positioned to one side of the display. Many displays present a consistent display across a wide range of viewing angles, but these displays may consume energy and/or compromise user privacy. Presented herein are configurations of backlights for display devices featuring an adjustable viewing angle, such that a user may select a narrower viewing angle in usage scenarios involving power consumption or privacy, and may select a wider viewing angle in usage scenarios involving plentiful power and fewer privacy concerns. Such configurations may include multiple banks of backlight lamps generating backlight at different viewing angles; an electrowetting electrode as an adjustable collimator; adjustable diffusers that may adjustably scatter light passing therethrough; and/or a combination of such adjustable elements.

Abstract: Computing devices are often designed in view of a particular usage scenario, but may be unsuitable for usage in other computing scenarios. For example, a notebook computer with a large display, an integrated keyboard, and a high-performance processor suitable for many computing tasks may be heavy, large, and power-inefficient; and a tablet lacking a keyboard and incorporating a low-powered processor may improve portability but may present inadequate performance for many tasks. Presented herein is a configuration of a computing device featuring a display unit with a resource-conserving processor that may be used independently (e.g., as a tablet), but that may be connected to a base unit featuring a resource-intensive processor. The operating system of the device may accordingly transition between a resource-intensive computing environment and a resource-conserving computing environment based on the connection with the base unit, thereby satisfying the dual roles of workstation and portable tablet device.

Abstract: A user may issue commands to a computing device by moving a pointer within a light field. Sensors may capture light reflected from the moving pointer. A virtual touch engine may analyze the reflected light captured as light portions in a sequence of images by the sensors to issue a command to a computing device in response to the movements. Analyzing the sequence of images may include finding the light portions in the sequence of images, determining a size of the light portions, and determining a location of the light portions.

Abstract: Some implementations provide techniques and arrangements to receive image information. A plurality of reference fields of a user-manipulated device may be identified. Each reference field of the plurality of reference fields may include reference elements. The plurality of reference fields may be identified based on colors of the reference elements, shapes of the reference elements, and/or a pattern of the reference elements. Some implementations may generate position information based on the plurality of reference fields. The position information may identify a position of the user-manipulated device relative to the video camera. Some implementations may provide the position information to an application.

Abstract: A position determination module is described which receives image information from a video camera. The position determination module identifies at least one reference field in the image information to provide identified reference information. The position determination module then generates position information based on the identified reference information. The position information is associated with a position of the reference field with respect the video camera. In one implementation, the video camera is stationary and the reference field is coupled to a user-manipulated device. In another implementation, the reference field is coupled to a stationary display device and the video camera is coupled to a movable user-manipulated device.