Patents by Inventor Feng Kang
Feng Kang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11988923Abstract: A display panel and a display device are disclosed. The display panel includes a first substrate, a second substrate, and a liquid crystal layer disposed therebetween. The first substrate includes a first base and a planarization layer disposed on a side of the first substrate adjacent to the liquid crystal layer. A side of the planarization layer adjacent to the liquid crystal layer includes a textured structure, which includes at least one groove path. The first substrate further includes a bottom edge. An extending direction of the at least one groove path forms an included angle with the bottom edge, the included angle being greater than or equal to 45 degrees and less than or equal to 135 degrees. A liquid crystal material in the liquid crystal layer diffuses along the extending direction of the groove path through the groove path based on capillary phenomenon.Type: GrantFiled: December 23, 2022Date of Patent: May 21, 2024Assignees: MIANYANG HKC OPTOELECTRONICS TECHNOLOGY CO., LTD, HKC CORPORATION LIMITEDInventors: Liu He, Keming Yang, Rong Tang, Yizhen Xu, Feng Jiang, Baohong Kang
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Publication number: 20240161410Abstract: Various implementations disclosed herein include devices, systems, and methods that generate floorplans and measurements using a three-dimensional (3D) representation of a physical environment generated based on sensor data.Type: ApplicationFiled: January 25, 2024Publication date: May 16, 2024Inventors: Feng Tang, Afshin Dehghan, Kai Kang, Yang Yang, Yikang Liao, Guangyu Zhao
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Publication number: 20240112688Abstract: The present disclosure provides an audio compression device, an audio compressing system and an audio compression method. The audio compression device comprises a first transceiver and a first processor. The first transceiver is connected to the first processor. The processor obtains an audio signal and an available bandwidth, and the processor performs an audio compression encoding on the audio signal to obtain a sample audio signal, and then compares with the audio signal and the sample audio signal to generate a residual signal, and the residual signal is transmitted according to the available bandwidth. The audio signal can be completely transmitted to an audio decompression device to reduce the distortion of the audio signal.Type: ApplicationFiled: October 4, 2022Publication date: April 4, 2024Applicant: SAVITECH CORP.Inventors: Sing-Ban Robert TIEN, Wen-Wei KANG, Wu-Lin CHANG, Chi-Feng HUANG, Lee-Chang PANG
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Patent number: 11922580Abstract: Various implementations disclosed herein include devices, systems, and methods that generate floorplans and measurements using a three-dimensional (3D) representation of a physical environment generated based on sensor data.Type: GrantFiled: January 12, 2021Date of Patent: March 5, 2024Assignee: Apple Inc.Inventors: Feng Tang, Afshin Dehghan, Kai Kang, Yang Yang, Yikang Liao, Guangyu Zhao
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Patent number: 11734948Abstract: A device and a method for contactless fingerprint acquisition is provided. The contactless fingerprint acquisition device includes a housing including a finger scanning area for at least one finger; at least two image capturing devices located in the housing and arranged in a predetermined baseline distance, each image capturing device having an optical axis in a predetermined angle with the vertical direction; and, a lighting unit in the housing for illuminating the at least one finger. The at least two image capturing devices are operable to acquire a plurality of partial fingerprint images of the at least one finger, and the plurality of partial fingerprint images correspond to different portions of the at least one finger.Type: GrantFiled: March 11, 2019Date of Patent: August 22, 2023Assignee: MOQI TECHNOLOGY (BEIJING) CO., LTD.Inventors: Linpeng Tang, Cheng Tai, Feng Kang, Wei Hu, Bo Liu
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Patent number: 11525652Abstract: A preparation method of a uniform low stress cone shaped charge liner includes the steps of multi-pass extrusion forming, vibration aging treatment, and cryogenic treatment. The step of multi-pass extrusion forming refers to 4 to 8 passes of extrusion deformation under the actions of a three-dimensional compressive stress and a deformation rate of 5 to 10 mm/s, having a deformation amount of 5 to 50% for each pass. The shaped charge liner prepared by the present invention has high dimensional accuracy, good geometric symmetry, low stress value, and excellent stability in the precise machining process and in use, which may significantly improve the penetration capability and stability of the shaped charge liner of high-explosive anti-tank warheads.Type: GrantFiled: December 5, 2018Date of Patent: December 13, 2022Assignee: No.59 Research Institute of China Ordnance IndustryInventors: Qiang Chen, Dayu Shu, Qiang Zhao, Feng Kang, Shuhai Huang, Wei Zhang, Zude Zhao, Xiangsheng Xia
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Publication number: 20220327858Abstract: A device and a method for contactless fingerprint acquisition is provided. The contactless fingerprint acquisition device includes a housing including a finger scanning area for at least one finger; at least two image capturing devices located in the housing and arranged in a predetermined baseline distance, each image capturing device having an optical axis in a predetermined angle with the vertical direction; and, a lighting unit in the housing for illuminating the at least one finger. The at least two image capturing devices are operable to acquire a plurality of partial fingerprint images of the at least one finger, and the plurality of partial fingerprint images correspond to different portions of the at least one finger.Type: ApplicationFiled: March 11, 2019Publication date: October 13, 2022Inventors: Linpeng TANG, Cheng TAI, Feng KANG, Wei HU, Bo LIU
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Patent number: 11264409Abstract: There is provided an array base plate, including: a substrate; a first patterned part disposed on the substrate and adjacent to an encapsulation region of the substrate; a second patterned part disposed on the substrate, in a same layer as the first patterned part and adjacent to the first patterned part; wherein the first patterned part includes a through part on its side close to the second patterned part. There is also provided a manufacturing method for manufacturing the array base plate, and a display panel including the array base plate.Type: GrantFiled: May 31, 2019Date of Patent: March 1, 2022Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Nini Bai, Feng Kang, Liangliang Liu, Liang Tang, Zhiyong Xue, Hailong Li
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Patent number: 11075258Abstract: The present disclosure relates to the field of display technologies, and provides a display substrate, a manufacturing method thereof, a corresponding display panel and an encapsulation method for the same. The display substrate includes a base plate comprising a display area and an encapsulation area surrounding the display area, and an insulating layer and a plurality of wires located on the base plate. The insulating layer comprises at least one groove in the encapsulation area. At least one of the plurality of wires comprises a first portion in the display area and a second portion within a corresponding groove of the encapsulation area. There is only one said second portion present in each groove.Type: GrantFiled: October 18, 2018Date of Patent: July 27, 2021Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Liangliang Liu, Feng Kang, Nini Bai, Qi Liu
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Publication number: 20200343327Abstract: The present disclosure relates to the field of display technologies, and provides a display substrate, a manufacturing method thereof, a corresponding display panel and an encapsulation method for the same. The display substrate includes a base plate comprising a display area and an encapsulation area surrounding the display area, and an insulating layer and a plurality of wires located on the base plate. The insulating layer comprises at least one groove in the encapsulation area. At least one of the plurality of wires comprises a first portion in the display area and a second portion within a corresponding groove of the encapsulation area. There is only one said second portion present in each groove.Type: ApplicationFiled: October 18, 2018Publication date: October 29, 2020Inventors: Liangliang LIU, Feng KANG, Nini BAI, Qi LIU
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Publication number: 20200303427Abstract: There is provided an array base plate, including: a substrate; a first patterned part disposed on the substrate and adjacent to an encapsulation region of the substrate; a second patterned part disposed on the substrate, in a same layer as the first patterned part and adjacent to the first patterned part; wherein the first patterned part includes a through part on its side close to the second patterned part. There is also provided a manufacturing method for manufacturing the array base plate, and a display panel including the array base plate.Type: ApplicationFiled: May 31, 2019Publication date: September 24, 2020Inventors: Nini BAI, Feng KANG, Liangliang LIU, Liang TANG, Zhiyong XUE, Hailong LI
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Patent number: 10638406Abstract: The present invention relates to methods and apparatuses for providing selective network access, wherein a cell type indication is provided based on at least one of a preamble and a header portion of a broadcast signal. At the receiving end, it is checked based on at least one of the preamble and the header portion, whether broadcast signals are received from different first and second cell types. The first cell type is selected for network access, if both broadcast signals from the first and second cell types are received with sufficient strength.Type: GrantFiled: June 25, 2015Date of Patent: April 28, 2020Assignee: HMD Global OyInventors: Hai Jiang, Jian Feng Kang, Xiaoyi Wang, Chao Wei, Yi Wu, Dong Mei Zhang
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Patent number: 10566456Abstract: The disclosure discloses a thin film transistor, a method for fabricating the same, and an OLED display panel. The method for fabricating a thin film transistor includes: forming a poly-silicon layer and a gate insulation layer on a base substrate in that order; forming a pattern of a gate above the base substrate with the gate insulation layer in a patterning process; doping the base substrate with the pattern of the gate for the first time; forming a pattern of first photoresist on the base substrate doped for the first time, using a mask for forming the pattern of the gate, wherein the pattern of the first photoresist covers the pattern of the gate and an area for forming a lightly doped drain area; and doping the base substrate with the pattern of the first photoresist for the second time to form a pattern of an active layer.Type: GrantFiled: May 15, 2018Date of Patent: February 18, 2020Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.Inventors: Feng Kang, Nini Bai, Liangliang Liu, Liang Tang
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Patent number: 10555242Abstract: The present invention relates to methods and apparatuses for providing selective network access, wherein a cell type indication is provided based on at least one of a preamble and a header portion of a broadcast signal. At the receiving end, it is checked based on at least one of the preamble and the header portion, whether broadcast signals are received from different first and second cell types. The first cell type is selected for network access, if both broadcast signals from the first and second cell types are received with sufficient strength.Type: GrantFiled: June 6, 2008Date of Patent: February 4, 2020Assignee: HMD Global OyInventors: Hai Jiang, Jian Feng Kang, Xiao Yi Wang, Chao Wei, Yi Wu, Dong Mei Zhang
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Publication number: 20190170486Abstract: A preparation method of a uniform low stress cone shaped charge liner includes the steps of multi-pass extrusion forming, vibration aging treatment, and cryogenic treatment. The step of multi-pass extrusion forming refers to 4 to 8 passes of extrusion deformation under the actions of a three-dimensional compressive stress and a deformation rate of 5 to 10 mm/s, having a deformation amount of 5 to 50% for each pass. The shaped charge liner prepared by the present invention has high dimensional accuracy, good geometric symmetry, low stress value, and excellent stability in the precise machining process and in use, which may significantly improve the penetration capability and stability of the shaped charge liner of high-explosive anti-tank warheads.Type: ApplicationFiled: December 5, 2018Publication date: June 6, 2019Applicant: No.59 Research Institute of China Ordnance IndustryInventors: Qiang CHEN, Dayu SHU, Qiang ZHAO, Feng KANG, Shuhai HUANG, Wei ZHANG, Zude ZHAO, Xiangsheng XIA
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Patent number: 10209616Abstract: The present invention provides a mask plate, relating to a field of exposure technology, which can solve the problem of an existing mask plate that a resolution is limited by an effect of diffraction. The mask plate of the invention includes: a pattern structure, including a light blocking region and a light transmitting region; and a total reflection structure provided at an light-exiting side of the pattern structure, the total reflection structure including a high refraction layer and a first low refraction layer sequentially provided in a direction away from the pattern structure and contacting each other, wherein a refractive index of the high refraction layer is greater than a refractive index of the first low refraction layer.Type: GrantFiled: June 27, 2016Date of Patent: February 19, 2019Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.Inventors: Chaobo Zhang, Liangliang Liu, Hongwei Tian, Nini Bai, Shuai Han, Feng Kang, Liang Tang, Chuoluopeng, Tiangui Min
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Publication number: 20190027611Abstract: The disclosure discloses a thin film transistor, a method for fabricating the same, and an OLED display panel. The method for fabricating a thin film transistor includes: forming a poly-silicon layer and a gate insulation layer on a base substrate in that order; forming a pattern of a gate above the base substrate with the gate insulation layer in a patterning process; doping the base substrate with the pattern of the gate for the first time; forming a pattern of first photoresist on the base substrate doped for the first time, using a mask for forming the pattern of the gate, wherein the pattern of the first photoresist covers the pattern of the gate and an area for forming a lightly doped drain area; and doping the base substrate with the pattern of the first photoresist for the second time to form a pattern of an active layer.Type: ApplicationFiled: May 15, 2018Publication date: January 24, 2019Inventors: Feng KANG, Nini BAI, Liangliang LIU, Liang TANG
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Patent number: 10104731Abstract: A dimmable driver for an LED light fixture allows multiple types of dimmers to be used with the light fixture. The dimmable driver may be disconnected from one type of dimmer and subsequently connected to another type of dimmer without having to replace or otherwise adjust the driver for each dimmer. Multiple types of dimmers may be connected to dimmable driver at the same time and the dimmable driver may use dimming signals from one or several of these dimmers. In some embodiments, the dimmable driver is configured to accommodate a step dimmer, a 0-10 V dimmer, and a phase-cut dimmer. Other dimmers and dimming protocols may be accommodated by the dimmable driver in alternative embodiments. Such an arrangement maximizes flexibility for lighting specifiers, contractors, and distributors while minimizing potential errors, costs, delays, and obsolete inventory.Type: GrantFiled: December 8, 2015Date of Patent: October 16, 2018Assignee: ABL IP Holding LLCInventors: Feng-Kang Hu, Hangyang Wang, Feng Chen, Towfiq Chowdhury, Charles J. Spencer
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Patent number: 9852038Abstract: The invention relates to a debugging system and a debugging method of a multi-core processor. The debugging system includes a debugging host, a target processor, and a mapping and protocol conversion device. The debugging host includes a debugger, and the target processor includes a plurality of cores. The mapping and protocol conversion device is connected between the debugging host and the target processor, identifies a core architecture to which each of the cores belongs, and maps each of the cores respectively to at least one thread of at least one process according to the core architecture to which each of the cores belongs. Afterwards, the debugger executes a debugging procedure on the target processor according to the process and the thread corresponded to each of the cores.Type: GrantFiled: December 8, 2014Date of Patent: December 26, 2017Assignee: ALi CorporationInventors: Yu-Feng Kang, Qian-Zhi Wang
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Publication number: 20170227842Abstract: The present invention provides a mask plate, relating to a field of exposure technology, which can solve the problem of an existing mask plate that a resolution is limited by an effect of diffraction. The mask plate of the invention includes: a pattern structure, including a light blocking region and a light transmitting region; and a total reflection structure provided at an light-exiting side of the pattern structure, the total reflection structure including a high refraction layer and a first low refraction layer sequentially provided in a direction away from the pattern structure and contacting each other, wherein a refractive index of the high refraction layer is greater than a refractive index of the first low refraction layer.Type: ApplicationFiled: June 27, 2016Publication date: August 10, 2017Inventors: Chaobo ZHANG, Liangliang LIU, Hongwei TIAN, Nini BAI, Shuai HAN, Feng KANG, Liang TANG, Chuoluopeng, Tiangui MIN