Patents by Inventor Feng Qu

Feng Qu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11996610
    Abstract: The present disclosure provides an antenna and a manufacturing method thereof, and belongs to the field of communication technology. The antenna provided by an embodiment of the present disclosure includes: a first substrate and a second substrate opposite to each other, a dielectric layer provided therebetween, and a feed unit on a side of the second substrate away from the first substrate. The first substrate includes: a first base substrate; and a radiation unit on a side of the first base substrate close to the second substrate. The second substrate includes: a second base substrate; and a reference electrode layer on a side of the second base substrate away from the feed unit, the reference electrode layer has an opening, an orthographic projection of the opening on the second base substrate is at least partially overlapped with an orthographic projection of the radiation unit on the second base substrate.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: May 28, 2024
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yali Wang, Dongdong Zhang, Feng Qu
  • Patent number: 11996637
    Abstract: Provided is an antenna unit, including a first substrate and a second substrate that are oppositely disposed, a liquid crystal layer located between the first substrate and the second substrate, and a third substrate located on a side of the second substrate away from the liquid crystal layer. The first substrate includes a first base substrate and a radiation unit layer. The second substrate includes a second base substrate and a ground layer. The radiation unit layer and the ground layer face the liquid crystal layer. The third substrate includes a third base substrate and a feed structure layer, wherein the feed structure layer is located on a side of the third base substrate away from the second substrate.
    Type: Grant
    Filed: October 18, 2021
    Date of Patent: May 28, 2024
    Assignees: Beijing BOE Technology Development Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Yali Wang, Dongdong Zhang, Feng Qu
  • Publication number: 20240168348
    Abstract: Provided are an array substrate and a manufacturing method thereof, and a display device. The array substrate includes a plurality of data lines and sub-pixels. At least one sub-pixel includes: a first insulating layer; a gate; an active layer located on one side of the first insulating layer away from the gate; a pixel electrode; a first electrode located connected to the active layer and in contact with the pixel electrode; a second electrode connected to the active layer and a data line; a second insulating layer having a first opening, wherein the orthographic projection of the first opening partially overlaps with the orthographic projections of the pixel electrode and the first electrode; a connection electrode in contact with the pixel electrode and the first electrode through the first opening; and a common electrode located on one side of the second insulating layer away from the pixel electrode.
    Type: Application
    Filed: January 29, 2024
    Publication date: May 23, 2024
    Inventors: Wenjie Hou, Yingmeng Miao, Qiujie Su, Chongyang Zhao, Feng Qu
  • Patent number: 11988925
    Abstract: The embodiment of the present disclosure provides a driving backplate including a base substrate, and an insulation layer and a plurality of conductive structures on the base substrate. The insulation layer insulates the plurality of conductive structures from each other. The plurality of conductive structures includes a first conductive layer and a second conductive layer sequentially stacked along a direction away from the base substrate. At least one portion of a region in which the first conductive layer is in contact with the second conductive layer includes a flat contact region. An opening is formed at a position in the insulation layer corresponding to the conductive structure. An edge of the opening in the insulation layer is between the first conductive layer and the second conductive layer and is correspondingly in edge regions of the first conductive layer and the second conductive layer.
    Type: Grant
    Filed: October 28, 2020
    Date of Patent: May 21, 2024
    Assignees: Hefei Xinsheng Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Min He, Jing Wang, Xiaodong Xie, Tianyu Zhang, Xue Zhao, Tengfei Zhong, Xinxiu Zhang, Huayu Sang, Feng Qu
  • Patent number: 11990690
    Abstract: The present disclosure provides an antenna and a communication device, the antenna includes a dielectric substrate, a first radiating element, a second radiating element and a switching element, the second radiating element surrounds the first radiating element, the second radiating element is of an open-loop structure, at least one first groove is provided in the first radiating element, each switching element corresponds to one first groove, the switching element includes a membrane bridge and a signal electrode, the signal electrode is arranged on the dielectric substrate, coupled to the second radiating element, and insulated from the first radiating element, the membrane bridge is arranged on a side of the first radiating element away from the dielectric substrate, each membrane bridge crosses over one first groove, and at least part of the signal electrode is located in a space defined by the membrane bridge and the first groove.
    Type: Grant
    Filed: December 16, 2021
    Date of Patent: May 21, 2024
    Assignees: Beijing BOE Technology Development Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Chunxin Li, Jingwen Guo, Qianhong Wu, Feng Qu
  • Publication number: 20240162138
    Abstract: The present disclosure provides a method for forming a conductive via, and belongs to the technical field of electronic elements. The present method includes: preparing a dielectric layer, and forming a connection via, which extends through the dielectric layer in a thickness direction of the dielectric layer, in the dielectric layer; wherein the dielectric layer includes a first surface and a second surface oppositely arranged in the thickness direction of the dielectric layer; forming a connection electrode in the connection via, forming a first extraction electrode on the first surface, and forming a second extraction electrode on the second surface; wherein the connection electrode at least covers an inner wall of the connection via, and the first extraction electrode and the second extraction electrode are electrically connected to the connection electrode.
    Type: Application
    Filed: June 25, 2021
    Publication date: May 16, 2024
    Inventors: Xiyuan WANG, Feng QU
  • Publication number: 20240162607
    Abstract: The present disclosure provides a phase shifter, a driving method for the phase shifter, and an antenna system, and belongs to the field of communication technologies. The present disclosure provides a phase shifter, including: a control module, a digital-to-analog conversion module and a phase shift structure; the control module is configured to generate a plurality of correction signals according to phase shift degrees of the phase shift structure; the digital-to-analog conversion module is configured to generate a driving signal according to the correction signals; and the phase shift structure is configured to shift a phase of a microwave signal passing therethrough according to the driving signal.
    Type: Application
    Filed: September 26, 2021
    Publication date: May 16, 2024
    Inventors: Zongmin LIU, Wei LI, Junwei GUO, Xichao FAN, Feng QU, Biqi LI
  • Patent number: 11984633
    Abstract: The present disclosure provides a phase shifter and an antenna, and relates to the field of communication technology. The phase shifter provided by the embodiment of the present disclosure is divided into a first feeding region, a second feeding region and a phase-shift region. The phase shifter includes: a first substrate and a second substrate provided opposite to each other, a dielectric layer provided between the first substrate and the second substrate, and a first feeding structure and a second feeding structure. The first feeding structure is electrically coupled to one end of the signal line, and the second feeding structure is electrically coupled to the other end of the signal line. The first feeding structure is located in the first feeding region; and the second feeding structure is located in the second feeding region. Recesses are formed in the first base substrate and/or in the second base substrate.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: May 14, 2024
    Assignees: Beijing BOE Technology Development Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jia Fang, Feng Qu, Xiyuan Wang, Yang Zheng
  • Publication number: 20240155900
    Abstract: A display substrate includes a base substrate, a voltage line arranged at a peripheral region of the base substrate, an encapsulation layer arranged at a side of the voltage line away from the base substrate, and a plurality of pixel units arranged at a display region of the base substrate. The encapsulation layer is arranged at a part of the display region and the peripheral region of the base substrate. The display substrate further includes an antenna arranged at a side of the encapsulation layer away from the base substrate, the antenna is a grid-like antenna, the voltage line is provided with a hollowed-out portion, and an orthogonal projection of at least a part of an end of the antenna onto the base substrate is located within an orthogonal projection of the hollowed-out portion onto the base substrate.
    Type: Application
    Filed: November 25, 2021
    Publication date: May 9, 2024
    Applicants: Beijing BOE Technology Development Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Feng Wang, Jian Zhou, Yanzhao Li, Feng Qu
  • Publication number: 20240153816
    Abstract: A method for forming a metal liner layer for an interconnect uses a multi-metal deposition process to produce a reduced thickness liner. The back-end-of-the-line packaging process may include forming a metal liner layer by depositing a ruthenium layer with a first thickness of approximately 5 angstroms or less and depositing a first cobalt layer with a second thickness of approximately 20 angstroms or less. In some embodiments, the ruthenium layer may be deposited on a previously formed barrier layer and then undergoes a treatment process before depositing the first cobalt layer. In some embodiments, the first cobalt layer may be deposited on the ruthenium layer or the ruthenium layer maybe deposited on the first cobalt layer. In some embodiments, the ruthenium layer is deposited on the first cobalt layer and a second cobalt layer is deposited on the ruthenium layer.
    Type: Application
    Filed: November 4, 2022
    Publication date: May 9, 2024
    Inventors: Ge QU, Zhiyuan WU, Jiajie CEN, Feng CHEN
  • Publication number: 20240154323
    Abstract: The present disclosure provides an antenna, a method for manufacturing an antenna and a communication system. The antenna includes: a dielectric layer; a first electrode having at least one first opening therein; at least one radiating structure on a side of the dielectric layer different from that with the first electrode thereon; an orthographic projection of the radiating structure on the dielectric layer is located in that of the first opening on the dielectric layer; each radiating structure includes a second electrode and a third electrode, orthographic projections of the second and third electrodes on the dielectric layer are located in that of the first opening on the dielectric layer, the orthographic projections of the second and third electrodes on the dielectric layer are not overlapped; at least one first feed line and at least one second feed line.
    Type: Application
    Filed: June 3, 2021
    Publication date: May 9, 2024
    Inventors: Dongdong ZHANG, Qianhong WU, Yafei ZHANG, Yali WANG, Feng QU
  • Publication number: 20240142819
    Abstract: An array substrate, an opposite substrate and a display panel are provided. The array substrate comprises: a display region and a periphery region surrounding the display region, wherein the display region comprises a plurality of pixel regions, and each of the pixel regions comprises a reflective region and a transmissive region; the reflective region comprises a driving signal outputting layer, a segment gap layer, a passivation layer and a reflective layer, the reflective layer is coupled to the driving signal outputting layer to enable both the reflective layer and the driving signal outputting layer to function as a reflective region driving electrode; the transmissive region comprises a first electrode layer, the first electrode layer is coupled to the driving signal outputting layer, the passivation layer extends to the transmissive region, and the passivation layer is arranged between the first electrode layer and a first base of the display substrate.
    Type: Application
    Filed: May 21, 2021
    Publication date: May 2, 2024
    Inventors: Xiaojuan WU, Jiaxing WANG, Xuan ZHONG, Hongliang YUAN, Yao BI, Jinshuai DUAN, Feng QU, Xinxin ZHAO, Jian WANG
  • Patent number: 11972717
    Abstract: Embodiments of the present disclosure provide a method of driving display, and a display device. The method of driving display includes: scanning, progressively or rows by rows, a plurality of sub-pixels arranged in an N×M array, to turn on each row of sub-pixels scanned, so that a duration in which two adjacent rows of sub-pixels are simultaneously in an ON state is greater than or equal to two times a unit scanning time, wherein the unit scanning time is a time required for scanning a row of sub-pixels, N is an integer greater than 1, and M is an integer greater than 1; and applying data signals to at least two rows of sub-pixels simultaneously in the ON state, so that a duration of applying the data signals to each row of sub-pixels is greater than the unit scanning time.
    Type: Grant
    Filed: March 13, 2023
    Date of Patent: April 30, 2024
    Assignees: Beijing BOE Display Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Zhihua Sun, Yinlong Zhang, Qiujie Su, Feng Qu, Jing Liu, Yanping Liao, Xibin Shao
  • Patent number: 11973267
    Abstract: An antenna includes: a dielectric layer having first and second surfaces opposite to each other; a radiating layer on the first surface, and having therein a slit; a first shielding layer on the second surface, and being electrically connected to the radiating layer; a first insulating layer on an upper side of the radiating layer; and a switch unit on an upper side of the first insulating layer, and corresponding to the slit. Each switch unit includes: a first electrode, a second insulating layer, a connecting portion, and a second electrode on the first insulating layer sequentially. Orthogonal projections of the first and second electrodes on the dielectric layer overlap each other. The connecting portion is connected to the second electrode to form a gap between the first and second electrodes. Orthogonal projections of the second electrode and a corresponding slit on the dielectric layer overlap each other.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: April 30, 2024
    Assignees: Beijing BOE Technology Development Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Chunxin Li, Jia Fang, Yang Zheng, Feng Qu
  • Publication number: 20240132979
    Abstract: A set of primers and probes for simultaneous detection of Cymbidium mosaic virus (CymMV), Odontoglossum ringspot virus (ORSV), and Cymbidium ringspot virus (CymRSV) and a method for detecting CymMV, ORSV, and CymRSV, along with a method for their detection, are disclosed. The method involves designing multiplex real-time quantitative PCR detection primers and probes for CymMV, ORSV, and CymRSV and applying these primers and probes to the real-time quantitative PCR simultaneous detection of CymMV, ORSV, and CymRSV. It allows for faster detection of CymMV, ORSV, and CymRSV, taking only one-third of the time compared to uniplex real-time quantitative PCR technology, thereby reducing testing costs by approximately ? to ½ for each sample. The primers and probes are highly specific and sensitive, with a sensitivity as low as 1 to 10 copies. It provides an efficient and feasible detection method for early detection and prevention of CymMV, ORSV, and CymRSV.
    Type: Application
    Filed: January 1, 2024
    Publication date: April 25, 2024
    Applicants: FLOWER RESEARCH INSTITUTE OF YUNNAN ACADEMY OF AGRICULTURAL SCIENCES, YUNNAN UNIVERSITY
    Inventors: Lihua Wang, Aiqing Sun, Xuewei Wu, Suping Qu, Yiping Zhang, Xiumei Yang, Yan Su, Feng Xu, Lifang Zhang
  • Publication number: 20240130177
    Abstract: Embodiments of this application provide a display panel and a manufacturing method thereof, and a terminal device, which are applied to the field of terminal technologies. The display panel includes a rigid substrate, a driving circuit layer arranged on the rigid substrate, and a first organic layer structure, a conductive layer and a second organic layer structure that are sequentially arranged away from the rigid substrate, where the rigid substrate and the driving circuit layer are arranged bypassing a bendable region, and first organic layer structure, the conductive layer, and the second organic layer structure are distributed in at least a first peripheral region, the bendable region, and a binding region.
    Type: Application
    Filed: September 9, 2022
    Publication date: April 18, 2024
    Inventors: Yabin An, Wei Qu, Feng Zhang
  • Publication number: 20240127732
    Abstract: A shift-register unit, a grid driving circuit and a displaying device, which relates to the technical field of displaying. In the present disclosure, the oxide-semiconductor layers of the oxide thin-film transistors may be delimited into regions according to the total channel widths and the channel lengths required by the oxide thin-film transistors in the shift-register unit, wherein the sum of the widths of the independent semiconductor branches obtained by the delimitation is equal to the required total channel width. Accordingly, one oxide thin-film transistor can realize the required total channel width by using the one or more semiconductor branches, to ensure the normal operation of the oxide thin-film transistor, whereby the oxide-semiconductor layers of the different oxide thin-film transistors can be configured differently, to realize the purpose of reducing the border frame of the displaying device.
    Type: Application
    Filed: September 21, 2022
    Publication date: April 18, 2024
    Applicants: Hefei Xinsheng Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Yongxian Xie, Zhixiang Zou, Feng Qu, Chuanjiang Tang, Tong Yang, Xiaoye Ma, Fengzhen Lv, Ran Zhang
  • Publication number: 20240126122
    Abstract: The present disclosure relates to an array substrate. At least one of a pixel electrode and a common electrode in the array substrate has an electrode structure. The electrode structure includes: first and second electrode portions, and a conductive connection portion. The first electrode portion includes a first connection bar and first electrode bars. The second electrode portion includes a second connection bar and second electrode bars. No common line is provided in each of the sub-pixel regions.
    Type: Application
    Filed: December 26, 2023
    Publication date: April 18, 2024
    Applicants: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yifu CHEN, Yingying QU, Ting DONG, Jianhua HUANG, Lingdan BO, Feng QU
  • Publication number: 20240123423
    Abstract: A silicon-based solid amine sorbent for CO2 and the making method thereof including: providing a silicon source liquid which is a silicate solution or a liquid organosilicate, wherein the silicate solution comprises water and a first silicate dissolved in the water; mixing the silicon source liquid with a precipitant to perform a precipitation reaction to obtain a product liquid containing a precipitate, wherein the precipitate is a second silicate or silicic acid; filtering out the precipitate and washing the precipitate with water; mixing the precipitate filtrated out but not dried yet with an organic alcohol and then performing an azeotropic distillation to obtain a dehydrated precipitate; calcining the dehydrated precipitate to obtain a silicon-based support, wherein the silicon-based support is a powder of the second silicate powder or a silica powder; and impregnating the silicon-based support with an organic amine solution and then drying to obtain the silicon-based amine-containing solid sorbent for C
    Type: Application
    Filed: June 9, 2021
    Publication date: April 18, 2024
    Inventors: Zuotai ZHANG, Chunyan LI, Feng YAN, Xuehua SHEN, Fan QU
  • Patent number: 11959191
    Abstract: A method for manufacturing a silicon single crystal wafer for a multilayer structure device including: using a silicon single crystal wafer with oxygen concentration of 12 ppma (JEITA) or higher and composing an NV region; and performing an RTA treatment in a nitrogen-containing atmosphere and a temperature of 1225° C. or higher, a mirror-polish processing treatment, and a BMD-forming heat treatment manufacturing a silicon single crystal wafer having at least a DZ layer with a thickness of 5 to 12.5 ?m and a BMD layer positioned immediately below the DZ layer and a BMD density of 1×1011/cm3 or higher from the silicon single crystal wafer surface. During device formation, the silicon wafer surface stress is absorbed immediately below a surface layer, distortion defects are absorbed by the BMD layer, device formation region strength is enhanced, and surface layer dislocation occurrence and extension is suppressed.
    Type: Grant
    Filed: February 5, 2020
    Date of Patent: April 16, 2024
    Assignee: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Wei Feng Qu, Shizuo Igawa