Patents by Inventor Feng-Wei Kuo

Feng-Wei Kuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220320022
    Abstract: A method of forming a semiconductor structure includes forming a first redistribution structure including a first conductive pattern. The method further includes placing a die over the first redistribution structure. The method further includes disposing a molding material over the first redistribution structure to surround the die. The method further includes removing a portion of the molding material to form an opening. The method further includes disposing a dielectric material into the opening to form a dielectric member. The method further includes forming a second redistribution structure over the molding material and the dielectric member, wherein the second redistribution structure includes an antenna structure over the dielectric member and electrically connected to the die.
    Type: Application
    Filed: June 22, 2022
    Publication date: October 6, 2022
    Inventors: Feng-Wei KUO, Wen-Shiang LIAO
  • Patent number: 11454857
    Abstract: In an embodiment, a phase shifter includes: a light input end; a light output end; a p-type semiconductor material, and an n-type semiconductor material contacting the p-type semiconductor material along a boundary area, wherein the boundary area is greater than a length from the light input end to the light output end multiplied by a core width of the phase shifter.
    Type: Grant
    Filed: November 19, 2020
    Date of Patent: September 27, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Huan-Neng Chen, Chewn-Pu Jou, Lan-Chou Cho, Feng-Wei Kuo
  • Publication number: 20220299709
    Abstract: A device for optical signal processing includes a first layer, a second layer and a waveguiding layer. A lens is disposed within the first layer and adjacent to a surface of the first layer. The second layer is underneath the first layer and adjacent to another surface of the first layer. The waveguiding layer is located underneath the second layer and configured to waveguide a light beam transmitted in the waveguiding layer. A grating coupler is disposed over the waveguiding layer. The lens is configured to receive, from one of the grating coupler or a light-guiding element, the light beam, and focus the light beam towards another one of the light-guiding element or the grating coupler.
    Type: Application
    Filed: August 24, 2021
    Publication date: September 22, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Feng-Wei Kuo, Hsing-Kuo Hsia, Chewn-Pu Jou
  • Publication number: 20220301994
    Abstract: The present disclosure is directed to a method for forming metal insulator metal decoupling capacitors with scalable capacitance. The method can include forming a first redistribution layer with metal lines on a portion of a polymer layer, depositing a photoresist layer on the first redistribution layer, and etching the photoresist layer to form spaced apart first and second TIV openings in the photoresist layer, where the first TIV opening is wider than the second TIV opening. The method can further include depositing a metal in the first and second TIV openings to form respective first and second TIV structures in contact with the metal line, removing the photoresist layer, forming a high-k dielectric on a top surface of the first and second TIV structures, and depositing a metal layer on the high-k dielectric layer to form respective first and second capacitors.
    Type: Application
    Filed: June 10, 2022
    Publication date: September 22, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Feng-Wei Kuo, Wen-Shiang Liao
  • Patent number: 11448828
    Abstract: An optical device for coupling light propagating between a waveguide and an optical transmission component is provided. The optical device includes a taper portion and a grating portion. The taper portion is disposed between the grating portion and the waveguide. The grating portion includes rows of grating patterns. A first size of a first grating pattern in a first row of grating patterns is larger than a second size of a second grating pattern in a second row of grating patterns. A first distance between the first row of grating patterns and the waveguide is less than a second distance between the second row of grating patterns and the waveguide.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: September 20, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chan-Hong Chern, Chih-Chang Lin, Chewn-Pu Jou, Chih-Tsung Shih, Feng-Wei Kuo, Lan-Chou Cho, Min-Hsiang Hsu, Weiwei Song
  • Patent number: 11442296
    Abstract: An optical attenuating structure is provided. The optical attenuating structure includes a substrate, a waveguide, doping regions, an optical attenuating member, and a dielectric layer. The waveguide is extended over the substrate. The doping regions are disposed over the substrate, and include a first doping region, a second doping region opposite to the first doping region and separated from the first doping region by the waveguide, a first electrode extended over the substrate and in the first doping region, and a second electrode extended over the substrate and in the second doping region. The first optical attenuating member is coupled with the waveguide and disposed between the waveguide and the first electrode. The dielectric layer is disposed over the substrate and covers the waveguide, the doping regions and the first optical attenuating member.
    Type: Grant
    Filed: July 20, 2020
    Date of Patent: September 13, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Huan-Neng Chen, Feng-Wei Kuo, Min-Hsiang Hsu, Lan-Chou Cho, Chewn-Pu Jou, Wen-Shiang Liao
  • Publication number: 20220278058
    Abstract: A package structure includes a first die, a second die over and electrically connected to the first die, an insulating material around the second die, a first antenna extending through the insulating material and electrically connected to the second die, the first antenna being adjacent to a first sidewall of the second die, wherein the first antenna includes a first conductive plate extending through the insulating material, and a plurality of first conductive pillars extending through the insulating material, wherein the first conductive plate is between the plurality of first conductive pillars and the first sidewall of the second die.
    Type: Application
    Filed: May 7, 2021
    Publication date: September 1, 2022
    Inventors: Feng-Wei Kuo, Wen-Shiang Liao
  • Patent number: 11428870
    Abstract: A semiconductor structure including a semiconductor substrate, a first patterned dielectric layer, a grating coupler and a waveguide is provided. The semiconductor substrate includes an optical reflective layer. The first patterned dielectric layer is disposed on the semiconductor substrate and covers a portion of the optical reflective layer. The grating coupler and the waveguide are disposed on the first patterned dielectric layer, wherein the grating coupler and the waveguide are located over the optical reflective layer.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: August 30, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Feng-Wei Kuo, Wen-Shiang Liao
  • Publication number: 20220269006
    Abstract: An optical device for coupling light propagating between a waveguide and an optical transmission component is provided. The optical device includes a taper portion and a grating portion. The taper portion is disposed between the grating portion and the waveguide. The grating portion includes rows of grating patterns. A first size of a first grating pattern in a first row of grating patterns is larger than a second size of a second grating pattern in a second row of grating patterns. A first distance between the first row of grating patterns and the waveguide is less than a second distance between the second row of grating patterns and the waveguide.
    Type: Application
    Filed: February 22, 2021
    Publication date: August 25, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chan-Hong Chern, Chih-Chang Lin, Chewn-Pu Jou, Chih-Tsung Shih, Feng-Wei Kuo, Lan-Chou Cho, Min-Hsiang Hsu, Weiwei Song
  • Patent number: 11424175
    Abstract: A semiconductor structure includes a semiconductor substrate, a semiconductor device and a heating structure. The semiconductor substrate includes a device region and a heating region surrounding the device region. The semiconductor device is located on the device region. The heating structure is located on the heating region and includes an intrinsic semiconductor area, at least one heating element and at least one heating pad. The intrinsic semiconductor area is surrounding the semiconductor device. The at least one heating element is located at a periphery of the intrinsic semiconductor area. The at least one heating pad is joined with the at least one heating element, wherein the at least one heating pad includes a plurality of contact structures, and a voltage is supplied from the plurality of contact structures to control a temperature of the at least one heating element.
    Type: Grant
    Filed: December 2, 2020
    Date of Patent: August 23, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Tsung Shih, Chewn-Pu Jou, Stefan Rusu, Feng-Wei Kuo
  • Patent number: 11417596
    Abstract: In some embodiments, the present disclosure relates to an integrated chip that includes an insulator layer arranged over a substrate. Further, an upper routing structure is arranged over the insulator layer and is made of a semiconductor material. A lower optical routing structure is arranged below the substrate and is embedded in a lower dielectric structure. The integrated chip further includes an anti-reflective layer that is arranged below the substrate and directly contacts the substrate.
    Type: Grant
    Filed: August 4, 2020
    Date of Patent: August 16, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Weiwei Song, Chan-Hong Chern, Feng-Wei Kuo, Lan-Chou Cho, Stefan Rusu
  • Patent number: 11409139
    Abstract: A semiconductor device includes: a transistor layer including components of at least one transistor, a waveguide having a long axis extending in a first direction, and an alpha interconnection layer over the waveguide; a stack of metallization layers over the transistor layer, the stack including one or more beta interconnection layers interposed between corresponding pairs of neighboring ones of the metallization layers; and a heater in the alpha interconnection layer or in one of the one or more beta interconnection layers; and wherein, relative to a second direction substantially perpendicular to the first direction, the heater substantially overlaps at least a portion of the waveguide.
    Type: Grant
    Filed: June 10, 2020
    Date of Patent: August 9, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Feng-Wei Kuo, Chewn-Pu Jou, Huan-Neng Chen, Lan-Chou Cho
  • Publication number: 20220245321
    Abstract: A method and system for generating a physical layout for a grating coupler integrated in a photonically-enabled circuit are disclosed herein. In some embodiments, the method receives a parametrized wavelength, a parametrized first refractive index, a parametrized second refractive index, a parametrized taper length, a parametrized width, a parametrized grating length, and a parametrized incident angle of the optical beam incident onto the grating coupler and generates a physical layout for the grating coupler based on the received parametrized inputs, the generating of the physical layout is according to a predefined model, and outputs the physical layout of the grating coupler for manufacturing under a semiconductor fabrication process.
    Type: Application
    Filed: January 29, 2021
    Publication date: August 4, 2022
    Inventors: Feng-Wei KUO, Wen-Shiang LIAO
  • Publication number: 20220223533
    Abstract: An integrated circuit package integrates a photonic die (oDie) and an electronic die (eDie). More specifically, the integrated circuit package may include a plurality of redistribution layers communicatively coupled to at least one of the oDie and/or the eDie, where molded material at least partially surrounds the at least one of the oDie and/or the eDie.
    Type: Application
    Filed: March 30, 2022
    Publication date: July 14, 2022
    Inventors: Feng Wei Kuo, Chewn-Pu Jou, Shuo-Mao Chen
  • Patent number: 11387683
    Abstract: An integrated circuit (IC) includes a first circuit layer that includes a first wireless power transfer (WPT) device, a first chip electrically connected to the first circuit layer, and a first tracking circuit disposed in the first chip. The first WPT device may be configured to extract energy from an electromagnetic signal and provide an output voltage. The first tracking circuit may be powered by the output voltage of the first WPT device and may output tracking data in response to an instruction extracted from the electromagnetic signal.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: July 12, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Min-Jer Wang, Ching-Nen Peng, Chewn-Pu Jou, Feng Wei Kuo, Hao Chen, Hung-Chih Lin, Huan-Neng Chen, Kuang-Kai Yen, Ming-Chieh Liu, Tsung-Hsiung Lee
  • Publication number: 20220214501
    Abstract: An optical coupler is provided. The optical coupler includes: a first optical structure, and a second optical structure disposed over the first optical structure. The first optical structure includes: a first substrate, a first cladding layer disposed on the first substrate, and a first waveguide disposed on the first cladding layer. The first waveguide includes a first coupling portion, and the first coupling portion including a first taper part. The second optical structure includes: a second substrate, a dielectric layer disposed on the second substrate; and a second waveguide disposed on the dielectric layer. The second waveguide includes a second coupling portion, and the second coupling portion including a second taper part. The second taper part is disposed on and optically coupled with the first taper part, and a taper direction of the first taper part is the same as a taper direction of the second taper part.
    Type: Application
    Filed: January 4, 2021
    Publication date: July 7, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Feng-Wei Kuo, Chewn-Pu Jou, Cheng-Tse Tang, Hung-Yi Kuo
  • Patent number: 11362026
    Abstract: The present disclosure is directed to a method for forming metal insulator metal decoupling capacitors with scalable capacitance. The method can include forming a first redistribution layer with metal lines on a portion of a polymer layer, depositing a photoresist layer on the first redistribution layer, and etching the photoresist layer to form spaced apart first and second TIV openings in the photoresist layer, where the first TIV opening is wider than the second TIV opening. The method can further include depositing a metal in the first and second TIV openings to form respective first and second TIV structures in contact with the metal line, removing the photoresist layer, forming a high-k dielectric on a top surface of the first and second TIV structures, and depositing a metal layer on the high-k dielectric layer to form respective first and second capacitors.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: June 14, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Feng-Wei Kuo, Wen-Shiang Liao
  • Publication number: 20220149146
    Abstract: In an embodiment, a circuit includes: a transformer defining an inductive footprint within a first layer; a grounded shield bounded by the inductive footprint within a second layer separate from the first layer; and a circuit component bounded by the inductive footprint within a third layer separate from the second layer, wherein: the circuit component is coupled with the transformer through the second layer, and the third layer is separated from the first layer by the second layer.
    Type: Application
    Filed: January 26, 2022
    Publication date: May 12, 2022
    Inventors: Feng Wei KUO, Chewn-Pu JOU, Huan-Neng CHEN, Lan-Chou CHO, Robert Bogdan STASZEWSKI
  • Publication number: 20220137440
    Abstract: An optical modulator includes a dielectric layer and a waveguide. The waveguide is disposed on the dielectric layer. The waveguide includes an electrical coupling portion, a slab portion, and an optical coupling portion. The slab portion is directly in contact with both of the electrical coupling portion and the optical coupling portion. The slab portion has a first sub-portion and a second sub-portion connected to the first sub-portion. A top surface of the electrical coupling portion, a top surface of the first sub-portion, and a top surface of the second sub-portion are located at different level heights.
    Type: Application
    Filed: January 18, 2022
    Publication date: May 5, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Lan-Chou Cho, Chewn-Pu Jou, Feng-Wei Kuo, Huan-Neng Chen, Min-Hsiang Hsu
  • Publication number: 20220128858
    Abstract: The invention provides a display panel, which includes a first substrate, a second substrate, a liquid crystal layer, a light shielding pattern layer and a plurality of pixel structures. The liquid crystal layer is disposed between the first substrate and the second substrate, and includes a plurality of negative liquid crystal molecules. Each of the pixel structures includes a first electrode and a second electrode. The first electrode has an electrode opening and a first finger portion extending into the electrode opening. The second electrode has two second finger portions overlapping the electrode opening. The first finger portion and the two second finger portions are alternately arranged along a first direction inside the electrode opening and extend in a second direction.
    Type: Application
    Filed: October 12, 2021
    Publication date: April 28, 2022
    Applicant: HannStar Display Corporation
    Inventors: Chia-Hua Yu, Kun Tsai Huang, Feng-Wei Kuo, Luo-Yi Wu