Abstract: A computer-implemented method modifies a manufacturing process for integrated circuits that include memory chips and a memory buffer. One or more processors identify a performance trending estimate of memory chip failures versus memory buffer failures in failed integrated circuits. The processor(s) identify a location and address of each memory chip in the identified failed integrated circuits that has a memory chip failure. The processor(s) identify a wafer location on a wafer die on which each memory buffer that has a memory buffer failure was formed. The processor(s) predict a fault analysis (FA) pareto based on the performance trending estimate, the location and address of each memory chip in the failed integrated circuits, and the wafer location on the wafer die on which each memory buffer that has the memory buffer failure was formed such that a manufacturing process for the integrated circuits is modified based on the FA pareto.

Abstract: A communication circuit arrangement includes a first kernel dimension filter circuit configured to apply a first kernel dimension filter to a first input signal to estimate a first kernel dimension interference signal from a first amplifier, a second kernel dimension filter circuit configured to apply a second kernel dimension filter to a second input signal to estimate a second kernel dimension interference signal from a second amplifier, a joint delay tap dimension filter configured to apply a joint delay tap dimension filter to a combination of the first kernel dimension interference signal and the second kernel dimension interference signal to obtain an estimated joint interference signal, and a cancelation circuit configured to remove the estimated joint interference signal from a received signal to obtain a clean signal.

Abstract: To configure a UE for handover between a source evolved Node-B (eNB) and a target eNB using aerial communications in a cellular network, the UE processing circuitry is to decode measurement configuration information from the source eNB. The measurement configuration information includes a plurality of height thresholds associated with aerial height of the UE. A measurement report is encoded for transmission to the source eNB. The measurement report includes the aerial height of the UE and the measurement report generation triggered based on one or more triggering events associated with the plurality of height thresholds. RRC signaling from the source eNB is decoded, the RRC signaling including a handover command. The handover command is based on a handover decision by the source eNB using the measurement report. A handover from the source eNB to the target eNB is performed based on the handover command.

Abstract: A computer-implemented method modifies a manufacturing process for integrated circuits. One or more processors receive sensor readings that identify failed integrated circuits from a batch of integrated circuits, where each of the integrated circuits includes a set of dynamic random access memory (DRAM) chips and a memory buffer, where the memory buffer provides an interface between a memory controller and the DRAM chips. The processor(s) identify, based on the sensor readings, a performance trending estimate of DRAM failures versus memory buffer failures in the identified failed integrated circuits. The processor(s) predict a fault analysis (FA) pareto based on the performance trending estimate, a location and address of each DRAM in the identified failed integrated circuits, and a wafer location on the wafer die on which each memory buffer that has the memory buffer failure, such that a manufacturing process for the integrated circuits is modified based on the FA pareto.

Abstract: A method includes receiving a training data set for a first plurality of assemblies, wherein the training data set includes a plurality of components for each of two or more types of components of the first plurality of assemblies. The method analyzes the training data set for the first plurality of assemblies. Responsive to receiving a set of product component information for a second plurality of assemblies, the method creates a graded product cluster template for the second plurality of assemblies based on the analyzed training data for the first plurality of assemblies. The method sends the graded product cluster template to an automated manufacturing device, wherein the automated manufacturing device manufactures a first assembly from the second plurality of assemblies based on the graded product cluster template.

Abstract: A method for risk feature screening comprises: acquiring respective feature weights of a plurality of risk features, wherein the feature weights are either obtained by using a classification model trained using sample events or predefined, and wherein the classification model is configured to determine risk events; and selecting at least a part of the plurality of risk features through screening according to the feature weights and a predetermined constraint for limiting the length of a message generated based on the risk features.

Abstract: An electrode assembly for a high cycling battery is disclosed. The electrode assembly includes a separator envelope comprising a backweb of material. The backweb has opposing sides, a contact area including a plurality of vertical, continuous major ribs of substantially the same height spaced across the contact area and projecting from one of the opposing sides forming acid conduits therebetween. A rim area is provided on each respective end of the contact area and has a plurality of vertical shoulder ribs. The backweb of material is folded and each rim area, aligned by the folding of the backweb, at least partially secured to itself to form the separator envelope. A negative electrode is received in the separator envelope and a positive electrode is positioned adjacent to the negative electrode, separated from the negative electrode by the separator envelope. A separator and plate assembly and a lead-acid battery are also disclosed.

Abstract: A computer-implemented method modifies a manufacturing process for integrated circuits. One or more processors receive sensor readings that identify failed integrated circuits from a batch of integrated circuits, where each of the integrated circuits includes a set of dynamic random access memory (DRAM) chips and a memory buffer, where the memory buffer provides an interface between a memory controller and the DRAM chips. The processor(s) identify, based on the sensor readings, a performance trending estimate of DRAM failures versus memory buffer failures in the identified failed integrated circuits. The processor(s) predict a fault analysis (FA) pareto based on the performance trending estimate, a location and address of each DRAM in the identified failed integrated circuits, and a wafer location on the wafer die on which each memory buffer that has the memory buffer failure, such that a manufacturing process for the integrated circuits is modified based on the FA pareto.

Abstract: Methods and apparatus for predicting favored wireless service areas for drones are disclosed. A controller for a drone includes a service area identifier to identify favored wireless service areas during a flight of the drone. The favored wireless service areas are predicted by a model developed remotely from the drone. The controller also includes a service area selector to select one of the favored wireless service areas during the flight. The controller also includes a route manager to adjust a flight path of the drone during the flight based on the selected one of the favored wireless service areas.

Abstract: Techniques are described for improving handover performance in the context of UEs incorporated into unmanned aerial vehicles (UAVs, a.k.a., drones). A database is constructed that relates locations in a three-dimensional flying space to handover information that may include optimum scanning directions, optimum handover parameters, and/or optimum target cells to be monitored for possible handover.

Abstract: A centrifugal blower includes an electric motor, a centrifugal impeller driven by the motor, a diffuser mounted to the motor and disposed between the motor and the centrifugal impeller, and a casing mounted to the diffuser. The centrifugal impeller is received in a chamber defined by the diffuser and the casing. the casing defines an opening facing the inlet of the centrifugal impeller. The diffuser has a plurality of passage walls, and a plurality of diffusing passages, each bounded by neighboring passage walls. The diffuser further has at least one mounting portion connected to one of the passage walls. A cross section of each of the diffusing passages is increased form an outer end to an inner end thereof and no throat is formed in each of the diffusing passages.

Abstract: Systems and methods to encode and/or decode structured super-position coding to enhance control channel capacity are disclosed herein. User equipment (UE) may be configured to communicatively couple to an Evolved Universal Terrestrial Radio Access Network (E-UTRAN) Node B (eNB). A first UE and a second UE may be coupled to the eNB. Basic PDCCH may be sent to the second UE, and extra PDCCH may be sent to the first UE on the same time-frequency resource. The second UE may be able to decode the basic PDCCH as it normally does. The first UE may be able to decode the basic PDCCH for the second UE, cancel the basic PDCCH from the signal, and decode the extra PDCCH. The extra PDCCH may be restricted to certain positions relative to the basic PDCCH to simplify searching by the first UE.

Abstract: A communication circuit arrangement includes a signal path circuit configured to separately apply a kernel dimension filter and a delay tap dimension filter to an input signal for an amplifier to obtain an estimated interference signal, a cancelation circuit configured to subtract the estimated interference signal from a received signal to obtain a clean signal, and a filter update circuit configured to alternate between updating the kernel dimension filter and the delay tap dimension filter using the clean signal.

Abstract: A charger for a starting, lighting, and ignition (SLI) battery is provided. The charger includes a base unit having a pair of terminals that are adapted to engage a pair of conductive terminals coupled to a battery unit to electrically couple the base unit to the battery unit. The charger also includes charging circuitry having power conversion circuitry that is adapted to receive primary power and to convert the primary power to a battery power output compatible with a charging voltage of the battery unit.

Abstract: Apparatus, systems, and methods to identify victims and aggressors of interference in full duplex communication systems are described. In one example, a controller comprises logic to detect a quality of service issue in a wireless communication downlink with a first user equipment in a first cell and in response to detecting the quality of service issue, determine whether the user equipment is a victim of interference from a second user equipment or is a victim of interference from a downlink with a second user equipment in a second cell. Other examples are also disclosed and claimed.

Abstract: A charger for a starting, lighting, and ignition (SLI) battery is provided. The charger includes a base unit having a pair of terminals that are adapted to engage a pair of conductive terminals coupled to a battery unit to electrically couple the base unit to the battery unit. The charger also includes charging circuitry having power conversion circuitry that is adapted to receive primary power and to convert the primary power to a battery power output compatible with a charging voltage of the battery unit.

Abstract: A method for selecting at least one parameter for downlink data transmission with a mobile user equipment. The method is executable by a wireless communication base station having multiple antennas configured to communicate wirelessly with the mobile user equipment. The method receives an uplink probing signal from the mobile user equipment. The method determines a plurality of angles of arrival for a corresponding plurality of paths between the mobile user equipment and the multiple antennas. The method transmits a plurality of downlink probing signals directionally toward corresponding angles of arrival in the plurality of angles of arrival. Each downlink probing signal is a virtual antenna port with respect to the mobile user equipment. The method receives channel state information. The method composes at least one of a rank indicator (RI), precoding matrix indicator (PMI), or modulating and coding scheme (MCS) for downlink data transmission to the mobile user equipment.

Abstract: An adaptation hardware accelerator comprises a calculation unit to receive inputs at predefined time interval(s) that correspond to a calculation iteration, the inputs associated with adaptive filters having taps, and determine correlation and cross-correlation data based thereon for a given iteration. The correlation data comprises a correlation matrix. Determining the matrix comprises determining submatrices in an upper triangular portion and a diagonal portion of the matrix. The accelerator comprises an adaptation core unit to determine adaptive weights associated with the adaptive filters, respectively, based on an adaptive algorithm, utilizing the correlation and cross correlation data. The accelerator unit comprises a convergence detector unit to determine a convergence parameter; and a controller to generate an iteration signal for each time interval based on the parameter.

Abstract: A method and system for interference cancellation in a wireless communication device. The wireless communication device can include an interference estimator configured to generate one or more filter weights based on a transmit signal. The one or more filter weights can be generated based on one or more kernels generated by the interference estimator. The interference estimator can be configured to perform recursive linear square (RLS) estimations based on the one or more kernels. The RLS estimations can include one or more independent RLS estimations, one or more parallel RLS estimations and/or one or more cascade RLS estimations. The interference estimator can be configured to perform one or more orthogonally transform one or more kernels.