Abstract: A memory array and an operation method of the memory array are provided. The memory array includes first and second ferroelectric memory devices formed along a gate electrode, a channel layer and a ferroelectric layer between the gate electrode and the channel layer. The ferroelectric memory devices include: a common source/drain electrode and two respective source/drain electrodes, separately in contact with a side of the channel layer opposite to the ferroelectric layer, wherein the common source/drain electrode is disposed between the respective source/drain electrodes; and first and second auxiliary gates, capacitively coupled to the channel layer, wherein the first auxiliary gate is located between the common source/drain electrode and one of the respective source/drain electrodes, and the second auxiliary gate is located between the common source/drain electrode and the other respective source/drain electrode.

Abstract: An assembly structure includes a panel installing member, a back cover, a first frame component and a second frame component. The panel installing member is used for holding a first panel module, and a plurality of assembly holes is formed on the panel installing member. The back cover includes a plurality of posts, and each of the posts is disposed through the corresponding assembly hole. The first frame component is installed on the back cover for being selectively fixed on a side of the panel installing member or on a side of a second panel module. The second frame component is installed on the back cover for being selectively fixed on another side of the panel installing member or on another side of the second panel module, so as to fix the first panel module or the second panel module on the back cover cooperatively with the first frame component.