Patents by Inventor Ferdinando Pascale
Ferdinando Pascale has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11983073Abstract: Methods, systems, and devices for hardware reset management for universal flash storage (UFS) are described. A UFS device may initiate a boot-up procedure that includes multiple phases. The UFS device may perform a first reset operation to reset one or more circuits based on receiving a first reset command during a first phase. The UFS device perform a second phase and may initiate a portion of a second reset operation to reset the one or more circuits during the second phase based on a likelihood that a second reset command is to be received. The UFS device may receive the second reset command during the second phase after initiating the portion of the second reset operation. The UFS device may initiate a second portion of the second reset operation based on receiving the second reset command and initiating the portion of the second reset operation.Type: GrantFiled: July 27, 2022Date of Patent: May 14, 2024Assignee: Micron Technology, Inc.Inventors: Luca Porzio, Ferdinando Pascale, Roberto Izzi, Marco Onorato, Erminio Di Martino
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Publication number: 20240036977Abstract: Methods, systems, and devices for hardware reset management for universal flash storage (UFS) are described. A UFS device may initiate a boot-up procedure that includes multiple phases. The UFS device may perform a first reset operation to reset one or more circuits based on receiving a first reset command during a first phase. The UFS device perform a second phase and may initiate a portion of a second reset operation to reset the one or more circuits during the second phase based on a likelihood that a second reset command is to be received. The UFS device may receive the second reset command during the second phase after initiating the portion of the second reset operation. The UFS device may initiate a second portion of the second reset operation based on receiving the second reset command and initiating the portion of the second reset operation.Type: ApplicationFiled: July 27, 2022Publication date: February 1, 2024Inventors: Luca Porzio, Ferdinando Pascale, Roberto Izzi, Marco Onorato, Erminio Di Martino
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Patent number: 11309055Abstract: Apparatus and methods are disclosed, including test systems for memory devices. Example test systems and methods include power loss logic to determine when one or more test conditions have been met in a memory operation between a host device and a memory device under test. Example test systems and methods include a function to then instruct a power management device to trigger a power loss event.Type: GrantFiled: December 20, 2018Date of Patent: April 19, 2022Assignee: Micron Technology, Inc.Inventors: Claudio Giaccio, Ferdinando Pascale, Raffaele Mastrangelo, Erminio Di Martino, Ferdinando D'Alessandro, Cristiano Castellano, Andrea Castaldo
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Patent number: 11282553Abstract: Devices and techniques are disclosed herein for determining, using a host device, a timing relationship between a data strobe signal, such as from an embedded MultiMediaCard (eMMC) device, and an internal clock signal. The host device can control a delay circuit using the determined timing relationship, such as to align received read data for sampling, or to determine or adjust a delay value of the delay circuit.Type: GrantFiled: December 31, 2019Date of Patent: March 22, 2022Assignee: Micron Technology, Inc.Inventors: Claudio Giaccio, Ferdinando Pascale, Erminio Di Martino, Raffaele Mastrangelo, Ferdinando D'Alessandro, Andrea Castaldo, Cristiano Castellano
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Publication number: 20210341963Abstract: Devices and techniques are disclosed herein for determining, using a host device, a timing relationship between a data strobe signal, such as from an embedded MultiMediaCard (eMMC) device, and an internal clock signal. The host device can control a delay circuit using the determined timing relationship, such as to align received read data for sampling, or to determine or adjust a delay value of the delay circuit.Type: ApplicationFiled: July 12, 2021Publication date: November 4, 2021Inventors: Claudio Giaccio, Ferdinando Pascale, Erminio Di Martino, Raffaele Mastrangelo, Ferdinando D'Alessandro, Andrea Castaldo, Cristiano Castellano
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Patent number: 11061431Abstract: Devices and techniques are disclosed herein for determining, using a host device, a timing relationship between a data strobe signal, such as from an embedded MultiMediaCard (eMMC) device, and an internal clock signal. The host device can control a delay circuit using the determined timing relationship, such as to align received read data for sampling, or to determine or adjust a delay value of the delay circuit.Type: GrantFiled: June 28, 2018Date of Patent: July 13, 2021Assignee: Micron Technology, Inc.Inventors: Claudio Giaccio, Ferdinando Pascale, Erminio Di Martino, Raffaele Mastrangelo, Ferdinando D'Alessandro, Andrea Castaldo, Cristiano Castellano
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Publication number: 20200202971Abstract: Apparatus and methods are disclosed, including test systems for memory devices. Example test systems and methods include power loss logic to determine when one or more test conditions have been met in a memory operation between a host device and a memory device under test. Example test systems and methods include a function to then instruct a power management device to trigger a power loss event.Type: ApplicationFiled: December 20, 2018Publication date: June 25, 2020Inventors: Claudio Giaccio, Ferdinando Pascale, Raffaele Mastrangelo, Erminio Di Martino, Ferdinando D'Alessandro, Cristiano Castellano, Andrea Castaldo
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Publication number: 20200152245Abstract: Devices and techniques are disclosed herein for determining, using a host device, a timing relationship between a data strobe signal, such as from an embedded MultiMediaCard (eMMC) device, and an internal clock signal. The host device can control a delay circuit using the determined timing relationship, such as to align received read data for sampling, or to determine or adjust a delay value of the delay circuit.Type: ApplicationFiled: December 31, 2019Publication date: May 14, 2020Inventors: Claudio Giaccio, Ferdinando Pascale, Erminio Di Martino, Raffaele Mastrangelo, Ferdinando D'Alessandro, Andrea Castaldo, Cristiano Castellano
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Patent number: 10546620Abstract: Devices and techniques are disclosed herein for determining, using a host device, a timing relationship between a data strobe signal, such as from an embedded MultiMediaCard (eMMC) device, and an internal clock signal. The host device can control a delay circuit using the determined timing relationship, such as to align received read data for sampling, or to determine or adjust a delay value of the delay circuit.Type: GrantFiled: June 28, 2018Date of Patent: January 28, 2020Assignee: Micron Technology, Inc.Inventors: Claudio Giaccio, Ferdinando Pascale, Erminio Di Martino, Raffaele Mastrangelo, Ferdinando D'Alessandro, Andrea Castaldo, Cristiano Castellano
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Publication number: 20200005840Abstract: Devices and techniques are disclosed herein for determining, using a host device, a timing relationship between a data strobe signal, such as from an embedded MultiMediaCard (eMMC) device, and an internal clock signal. The host device can control a delay circuit using the determined timing relationship, such as to align received read data for sampling, or to determine or adjust a delay value of the delay circuit.Type: ApplicationFiled: June 28, 2018Publication date: January 2, 2020Inventors: Claudio Giaccio, Ferdinando Pascale, Erminio Di Martino, Raffaele Mastrangelo, Ferdinando D'Alessandro, Andrea Castaldo, Cristiano Castellano
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Publication number: 20200004289Abstract: Devices and techniques are disclosed herein for determining, using a host device, a timing relationship between a data strobe signal, such as from an embedded MultiMediaCard (eMMC) device, and an internal clock signal. The host device can control a delay circuit using the determined timing relationship, such as to align received read data for sampling, or to determine or adjust a delay value of the delay circuit.Type: ApplicationFiled: June 28, 2018Publication date: January 2, 2020Inventors: Claudio Giaccio, Ferdinando Pascale, Erminio Di Martino, Raffaele Mastrangelo, Ferdinando D'Alessandro, Andrea Castaldo, Cristiano Castellano