Patents by Inventor Feroz Mohammad
Feroz Mohammad has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11916322Abstract: Techniques and mechanisms for coupling packaged devices with a dual-sided socket device. In an embodiment, two interfaces of the socket device comprise, respectively, first metallization structures and second metallization structures on opposite sides of a socket body structure. The first metallization structures each form a respective corrugation structure to electrically couple with a corresponding conductive contact of a first packaged device. The corrugation structures facilitate such electrical coupling each via a vertical wipe of the corresponding conductive contact. In another embodiment, a pitch of the first metallization structures is in a range of between 0.1 millimeters (mm) and 2 mm. One such metallization structure has a vertical span in a range of between 0.05 mm and 2.0 mm, where a portion of a side of the metallization structure forms a corrugation structure, and has a horizontal span which is at least 5% of the vertical span.Type: GrantFiled: September 25, 2020Date of Patent: February 27, 2024Assignee: Intel CorporationInventors: Srikant Nekkanty, Steven Klein, Feroz Mohammad
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Patent number: 11830846Abstract: Embodiments herein relate to systems, apparatuses, or processes for coupling or decoupling two substrates by heating pins on one of the substrates and either inserting or withdrawing the heated pins from solder elements on a BGA. In particular, by heating a plurality of pins on a first side of a first substrate, where the plurality of pins are substantially perpendicular to a plane of the substrate, inserting the heated plurality of pins into BGA attached to a second substrate where the BGA includes a plurality of solder elements aligned with the plurality of pins and where the heated plurality of pins melt the plurality of solder elements upon insertion. The inserted plurality of pins physically and/or electrically couple the first substrate and the second substrate.Type: GrantFiled: May 28, 2019Date of Patent: November 28, 2023Assignee: Intel CorporationInventors: Feroz Mohammad, Srinivasa R. Aravamudhan
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Patent number: 11818832Abstract: Embodiments disclosed herein include assemblies. In an embodiment, an assembly comprises a socket and a bolster plate on a board, where the bolster plate has load studs and an opening that surrounds the socket; a shim having first and second ends; and a carrier on the bolster plate, where the carrier has an opening and cutouts. The shim may have an opening through the first end as the second end is affixed to the carrier. The opening of the shim entirely over one cutout from a corner region of the carrier. In an embodiment, the assembly comprises an electronic package in the opening of the carrier, where the electronic package is affixed to the carrier, and a heatsink over the electronic package and carrier, where the first end is directly coupled to a surface of the heatsink and a surface of one load stud of the bolster plate.Type: GrantFiled: March 24, 2020Date of Patent: November 14, 2023Assignee: Intel CorporationInventors: Feroz Mohammad, Ralph V. Miele, Thomas Boyd, Steven A. Klein, Gregorio R. Murtagian, Eric W. Buddrius, Daniel Neumann, Rolf Laido
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Patent number: 11569596Abstract: Systems, apparatus, and/or processes directed to applying pressure to a socket to alter a shape of the socket to improve a connection between the socket and a substrate, printed circuit board, or other component. The socket may receive one or more chips, may be an interconnect, or may be some other structure that is part of a package. The shape of the socket may be flattened so that a side of the socket may form a high-quality physical and electrical coupling with the substrate.Type: GrantFiled: March 27, 2020Date of Patent: January 31, 2023Assignee: Intel CorporationInventors: Steven A. Klein, Kuang Liu, Srikant Nekkanty, Feroz Mohammad, Donald Tiendung Tran, Srinivasa Aravamudhan, Hemant Mahesh Shah, Alexander W. Huettis
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Publication number: 20220200183Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques related to micro socket arrays with fine pitch contacts to electrically couple dies, in particular photonics dies, within multichip photonics packages. In embodiments, micro socket arrays may be used in conjunction with multichip module packaging that include silicon photonic engines and optical fiber modules on the same package. In embodiments, these packages may also use a system on chip (SOC), as well as fine pitch die to die connections, for example an EMIB, that may be used to connect a PIC with an SOC. Other embodiments may be described and/or claimed.Type: ApplicationFiled: December 23, 2020Publication date: June 23, 2022Inventors: Srikant NEKKANTY, Debendra MALLIK, Joe F. WALCZYK, Saikumar JAYARAMAN, Feroz MOHAMMAD
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Publication number: 20220102883Abstract: Techniques and mechanisms for coupling packaged devices with a dual-sided socket device. In an embodiment, two interfaces of the socket device comprise, respectively, first metallization structures and second metallization structures on opposite sides of a socket body structure. The first metallization structures each form a respective corrugation structure to electrically couple with a corresponding conductive contact of a first packaged device. The corrugation structures facilitate such electrical coupling each via a vertical wipe of the corresponding conductive contact. In another embodiment, a pitch of the first metallization structures is in a range of between 0.1 millimeters (mm) and 2 mm. One such metallization structure has a vertical span in a range of between 0.05 mm and 2.0 mm, where a portion of a side of the metallization structure forms a corrugation structure, and has a horizontal span which is at least 5% of the vertical span.Type: ApplicationFiled: September 25, 2020Publication date: March 31, 2022Applicant: Intel CorporationInventors: Srikant Nekkanty, Steven Klein, Feroz Mohammad
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Publication number: 20220102892Abstract: Techniques and mechanisms for coupling packaged devices with a socket device. In an embodiment, the socket device comprises a socket body structure and conductors extending therethrough. A pitch of the conductors is in a range of between 0.1 millimeters (mm) and 3 mm. First and second metallization structures also extend, respectively, from opposite respective sides of the socket body structure. In the socket body structure, a conductive shield structure, electrically coupled to the first and second metallization structures, substantially extends around one of the conductors. For each of the first and second metallization structures, a vertical span of the metallization structure is in a range of between 0.05 mm and 2.0 mm, a portion of a side of the metallization structure forms a respective corrugation structure, and a horizontal span of the portion is at least 5% of the vertical span of the metallization structure.Type: ApplicationFiled: September 25, 2020Publication date: March 31, 2022Applicant: Intel CorporationInventors: Srikant Nekkanty, Steven Klein, Feroz Mohammad, Joe Walczyk, Kuang Liu, Zhichao Zhang
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Publication number: 20220069532Abstract: An integrated circuit assembly may be formed comprising an electronic socket having at least one conductive pin, wherein a portion of the conductive pin extends from the electronic socket. The integrated circuit assembly further comprises a conductive interposer including at least one conductive via having a conductive layer on a sidewall thereof. The conductive interposer is abutted against the electronic socket, such that the at least one conductive pin is inserted into the at least one conductive via and is biased against the conductive layer of the at least one conductive via. In further embodiments, an integrated circuit package may be electrically attached to the conductive interposer.Type: ApplicationFiled: September 1, 2020Publication date: March 3, 2022Applicant: Intel CorporationInventors: Feroz Mohammad, Steven Klein, Srikant Nekkanty
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Publication number: 20210305731Abstract: Systems, apparatus, and/or processes directed to applying pressure to a socket to alter a shape of the socket to improve a connection between the socket and a substrate, printed circuit board, or other component. The socket may receive one or more chips, may be an interconnect, or may be some other structure that is part of a package. The shape of the socket may be flattened so that a side of the socket may form a high-quality physical and electrical coupling with the substrate.Type: ApplicationFiled: March 27, 2020Publication date: September 30, 2021Inventors: Steven A. KLEIN, Kuang LIU, Srikant NEKKANTY, Feroz MOHAMMAD, Donald Tiendung TRAN, Srinivasa ARAVAMUDHAN, Hemant Mahesh SHAH, Alexander W. HUETTIS
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Publication number: 20210307153Abstract: Embodiments disclosed herein include assemblies. In an embodiment, an assembly comprises a socket and a bolster plate on a board, where the bolster plate has load studs and an opening that surrounds the socket; a shim having first and second ends; and a carrier on the bolster plate, where the carrier has an opening and cutouts. The shim may have an opening through the first end as the second end is affixed to the carrier. The opening of the shim entirely over one cutout from a corner region of the carrier. In an embodiment, the assembly comprises an electronic package in the opening of the carrier, where the electronic package is affixed to the carrier, and a heatsink over the electronic package and carrier, where the first end is directly coupled to a surface of the heatsink and a surface of one load stud of the bolster plate.Type: ApplicationFiled: March 24, 2020Publication date: September 30, 2021Inventors: Feroz MOHAMMAD, Ralph V. MIELE, Thomas BOYD, Steven A. KLEIN, Gregorio R. MURTAGIAN, Eric W. BUDDRIUS, Daniel NEUMANN, Rolf LAIDO
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Publication number: 20200381388Abstract: Embodiments herein relate to systems, apparatuses, or processes for coupling or decoupling two substrates by heating pins on one of the substrates and either inserting or withdrawing the heated pins from solder elements on a BGA. In particular, by heating a plurality of pins on a first side of a first substrate, where the plurality of pins are substantially perpendicular to a plane of the substrate, inserting the heated plurality of pins into BGA attached to a second substrate where the BGA includes a plurality of solder elements aligned with the plurality of pins and where the heated plurality of pins melt the plurality of solder elements upon insertion. The inserted plurality of pins physically and/or electrically couple the first substrate and the second substrate.Type: ApplicationFiled: May 28, 2019Publication date: December 3, 2020Inventors: Feroz MOHAMMAD, Srinivasa R. ARAVAMUDHAN
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Patent number: 10505297Abstract: An electronic device that includes a first electronic component with a pin element and a second electronic component with a solder element. A joint is formed that provides an electrical and mechanical connection between the first electronic component and second electronic component when the pin element is heated, inserted into the solder element, and cooled.Type: GrantFiled: March 28, 2018Date of Patent: December 10, 2019Assignee: Intel CorporationInventors: Feroz Mohammad, Srinivasa Aravamudhan
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Publication number: 20190305451Abstract: An electronic device that includes a first electronic component with a pin element and a second electronic component with a solder element. A joint is formed that provides an electrical and mechanical connection between the first electronic component and second electronic component when the pin element is heated, inserted into the solder element, and cooled.Type: ApplicationFiled: March 28, 2018Publication date: October 3, 2019Inventors: Feroz Mohammad, Srinivasa Aravamudhan
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Patent number: 10355380Abstract: An electronic device that includes a first electronic component with a pin element and a second electronic component with a solder element. A joint is formed that provides an electrical and mechanical connection between the first electronic component and second electronic component when the pin element is heated, inserted into the solder element, and cooled.Type: GrantFiled: March 28, 2018Date of Patent: July 16, 2019Assignee: Intel CorporationInventors: Feroz Mohammad, Srinivasa Aravamudhan
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Patent number: 10044115Abstract: An apparatus comprises a cable connector including: a first connector body portion including a first plurality of electrical contacts arranged to contact electrical contacts of a first surface of an edge connector substrate; a second connector body portion separate from the first connector body portion and including a second plurality of electrical contacts arranged to oppose the first plurality of electrical contacts of the first connector body portion and to contact electrical contacts of a second surface of the edge connector substrate, wherein the first and second plurality of electrical contacts are electrically coupled to one or more cables; and a joining mechanism configured to join the first connector body portion and the second connector body portion together and to apply a bias force to the edge connector substrate when the edge connector substrate is arranged between the first connector body portion and the second connector body portion.Type: GrantFiled: December 23, 2015Date of Patent: August 7, 2018Assignee: Intel CorporationInventors: Donald T. Tran, Gregorio Murtagian, Kuang Liu, Srikant Nekkanty, Feroz Mohammad, Karumbu Meyyappan, Hong Xie, Russell S. Aoki, Gaurav Chawla
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Publication number: 20170187147Abstract: An apparatus comprises a cable connector including: a first connector body portion including a first plurality of electrical contacts arranged to contact electrical contacts of a first surface of an edge connector substrate; a second connector body portion separate from the first connector body portion and including a second plurality of electrical contacts arranged to oppose the first plurality of electrical contacts of the first connector body portion and to contact electrical contacts of a second surface of the edge connector substrate, wherein the first and second plurality of electrical contacts are electrically coupled to one or more cables; and a joining mechanism configured to join the first connector body portion and the second connector body portion together and to apply a bias force to the edge connector substrate when the edge connector substrate is arranged between the first connector body portion and the second connector body portion.Type: ApplicationFiled: December 23, 2015Publication date: June 29, 2017Inventors: Donald T. Tran, Gregorio Murtagian, Kuang Liu, Srikant Nekkanty, Feroz Mohammad, Karumbu Meyyappan, Hong Xie, Russell S. Aoki, Gaurav Chawla