Abstract: A semiconductor switch comprises two NMOS transistors coupled in an anti-series arrangement, and a gate control circuit coupled to both gates of the NMOS transistors. Both drains of the NMOS transistors are interconnected, and the gate control circuit is coupled to the drains interconnection. The required chip area is halved compared to prior art switches. Pumping the gates to higher voltages may cause a further reduction of the sizes of the NMOS transistors. In addition, advantageously, a large range of input and output voltages can be allowed between the sources of the NMOS transistors, whereby the sources act as input and output respectively of the switch, thus allowing application of the switch in a broad technical field.

Abstract: A power management system (100) comprising a power generator (1) for providing a supply signal (Vchg) to a load (2), a floating controllable bi-directional current sensor (N1) coupled via a first connection (10) to the power generator and via a second connection (20) to the load (2) for detecting a positive current (pos) flowing from the power generator (1) to the load (2) and a negative current (neg) from the load (2) to the power generator (3).

Abstract: A semiconductor switch comprises two NMOS transistors coupled in an anti-series arrangement, and a gate control circuit coupled to both gates of the NMOS transistors. Both drains of the NMOS transistors are interconnected, and the gate control circuit is coupled to the drains interconnection. The required chip area is halved compared to prior art switches. Pumping the gates to higher voltages may cause a further reduction of the sizes of the NMOS transistors. In addition advantageously a large range of input and output voltages can be allowed between the sources of the NMOS transistors, whereby the sources act as input and output respectively of the switch, thus allowing application of the switch in a broad technical field.