Patents by Inventor Flavio Melindo

Flavio Melindo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4845702
    Abstract: An optical switching system, wherein the input channels carrying packetized data are switched one-by-one at high bit rate to output channels through an optical switching network. The packets of a generic input channel are time compressed, converted into optical signals and, at suitable instants, sent to an optical switching network to be switched to the desired output channel, they are then reconverted into electrical signals and expanded to their original duration. A centralized processor controls the channel switching through the switching network by means of a driving circuit.
    Type: Grant
    Filed: February 23, 1988
    Date of Patent: July 4, 1989
    Assignee: CSELT - Centro Studi e Laboratori Telecomunicazioni SpA
    Inventor: Flavio Melindo
  • Patent number: 4528425
    Abstract: In order to detect at an electronic telephone exchange the lifting of a subscriber's handset in response to ringing current sent over the line loop from a generator at that exchange, a charging current proportional to the incoming line current is fed to a capacitor over a recurrent integration period encompassing one or more whole ringing-current cycles. When the handset has been taken off the hook, the capacitor charge present at the end of such a period differs from zero on account of a d-c component superimposed upon the alternating ringing signal. In order to enable the use of a relatively small storage capacitor, the charging current is periodically interrupted by a train of chopping pulses. When the line current is measured at the exchange by a sensor responsive only to absolute magnitude, the polarity of the charging current is reversed in alternate nonzero-amplitude periods of a cycle.
    Type: Grant
    Filed: March 24, 1983
    Date of Patent: July 9, 1985
    Assignee: Cselt-Centro Studi E Laboratori Telecommunicazioni S.p.A.
    Inventors: Flavio Melindo, Mario Sartori
  • Patent number: 4362908
    Abstract: A circuit arrangement for emitting ringing signals to a subscriber station in response to a call signal electronically generated at a telephone exchange comprises a control unit which, in the presence of such call signal, intermittently reverses a switching relay normally connecting the talking conductors of the subscriber line to monitoring equipment of the exchange whereby these conductors periodically receive a high-voltage ringing current, e.g. of 25 Hz, from a local oscillator in series with a d-c supply. The direct current is blocked by a line-terminating capacitor until the called subscriber lifts the receiver off the hook to close the line loop. If this occurs while the line is connected to the oscillator, a sensor in the control unit detects a significant disparity between the durations of the positive and negative voltage swings in an oscillator cycle and causes the release of the switching relay when that disparity exceeds a dynamic threshold determined by the actual cycle length.
    Type: Grant
    Filed: February 18, 1981
    Date of Patent: December 7, 1982
    Assignee: CSELT - Centro Studi e Laboratori Telecomunicazioni S.p.A.
    Inventor: Flavio Melindo
  • Patent number: 4287392
    Abstract: The two talking wires of a line loop extending from a subscriber station to a central office, provided with respective blocking capacitors, are connected on the subscriber side of these blocking capacitors to respective signal detectors fed from a common battery and cross-coupled by a common compensating capacitor. The two signal detectors receive outgoing signals from the central-office equipment via a common photoelectric coupler and transmit incoming signals to that equipment by way of respective bistable threshold comparators and individal photoelectric couplers. The two signal detectors with their threshold comparators are constituted in integrated circuity by mutually complementary transistors and diodes together with associated resistors.
    Type: Grant
    Filed: May 30, 1979
    Date of Patent: September 1, 1981
    Assignee: CSELT - Centro Studi e Laboratori Telecomunicazioni S.p.A.
    Inventor: Flavio Melindo
  • Patent number: 4185172
    Abstract: Digitized samples of switching or supervisory signals in the form of specific frequency pairs, selected from n predetermined signaling frequencies, are received at a PCM terminal of a telephone exchange and fed to n frequency correlators, one for each signaling frequency used in the system, where the samples are multiplied by a sine function and a cosine function of the respective signaling frequency and the two products are integrated and vectorially added to form a resulting binary signal. The absolute value of the incoming-signal sample in each PCM time slot is multiplied in a pair of pseudo-correlators with two fixed values of approximately equal magnitude but opposite sign. A microcomputer compares the output signals of the several frequency correlators with a fixed threshold, or with an adaptive threshold derived from the output of one of the pseudo-correlaors if that threshold surpasses the fixed one.
    Type: Grant
    Filed: May 17, 1978
    Date of Patent: January 22, 1980
    Assignee: Cselt - Centro Studi e Laboratori Telecomunicazioni S.p.A.
    Inventors: Flavio Melindo, Renato Rocci
  • Patent number: 4096396
    Abstract: Three identical time-base units include respective binary counting circuits which are stepped in parallel by a series of clock pulses to generate trains of timing pulses and, after a certain number of clock cycles following resetting by a zeroizing pulse, emit synchronizing pulses which are jointly fed to three decision networks respectively associated with these counting circuits. The decision networks determine by majority logic whether synchronizing signals from at least two of the three counting circuits coincide and upon such coincidence cause the resetting of the respective counting circuits to zero. A monitoring circuit, also operating by majority logic, is connected to the three decision networks to indicate a malfunction of any of the three time-base units without halting the generation of the timing pulses by the defective unit if the latter is merely out of step.
    Type: Grant
    Filed: December 8, 1976
    Date of Patent: June 20, 1978
    Assignee: CSELT - Centro Studi e Laboratori Telecomunicazioni
    Inventors: Piero Belforte, Flavio Melindo
  • Patent number: 4059736
    Abstract: Two processors UP1 and UP2, designed to test the operation of a pair of switching networks IN1 and IN2 in a telecommunication system through respective sets of peripheral interface units P11 etc. and P21 etc., are interconnected for parallel operation and are each linked with both sets of peripheral units via branched output and input multiples carrying outgoing and incoming messages. Each set of peripheral units is served by a respective bus bar BUS1, BUS2 connectable at one end, via an outgoing multiplexer MX12, MX22, to one of the branches of either output multiple 2, 3 and at the other end, via an incoming multiplexer MX11, MX21, to one of the branches of either input multiple 12, 13.
    Type: Grant
    Filed: June 17, 1976
    Date of Patent: November 22, 1977
    Assignee: CSELT - Centro Studi e Laboratori Telecomunicazioni S.p.A.
    Inventors: Giovanni Perucca, Flavio Melindo, Girolamo De Vincentiis