Patents by Inventor Flynn P. CARSON

Flynn P. CARSON has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230178458
    Abstract: Package structures, modules containing such packages and methods of manufacture. are described. In an embodiment, a package includes a plurality of terminal pads, a plurality of passive components bonded to top sides of the plurality of terminal pads, a die bonded to top sides of the plurality of passive components and a molding compound encapsulating at least the plurality of passive components and the die.
    Type: Application
    Filed: December 8, 2021
    Publication date: June 8, 2023
    Inventors: Kumar Nagarajan, Flynn P. Carson, Karthik Shanmugam, Menglu Li, Raymundo M. Camenforte, Scott D. Morrison
  • Publication number: 20230066814
    Abstract: A radio frequency package includes a first portion of an antenna array module, a second portion of the antenna array module, and a flexible cable. The first portion of the antenna array module provides a first wireless communication functionality and the second portion of the antenna array module provides a second wireless communication functionality. The flexible cable includes first surface directly coupled to the first portion of the antenna array module. The flexible cable also includes a second surface directly coupled to the second portion of the antenna array module. The flexible cable communicates signals between the first portion of the distributed antenna array module and the second portion of the antenna array module.
    Type: Application
    Filed: September 2, 2021
    Publication date: March 2, 2023
    Inventors: Sidharth S. Dalmia, Wansuk Yun, Flynn P. Carson
  • Patent number: 11395408
    Abstract: Wafer level passive array packages and modules are described. In an embodiment, a module includes a circuit board, and a package mounted on the circuit board in which the package includes a plurality of passive components bonded to a bottom side of the die and a plurality of landing pads of the circuit board.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: July 19, 2022
    Assignee: Apple Inc.
    Inventors: Scott D. Morrison, Karthik Shanmugam, Raymundo M. Camenforte, Rakshit Agrawal, Flynn P. Carson, Kiranjit Dhaliwal
  • Publication number: 20220157680
    Abstract: Flexible packages and electronic devices with integrated flexible packages are described. In an embodiment, a flexibly package includes a first die and a second die encapsulated in a molding compound layer. A compliant redistribution layer (RDL) spans the molding compound layer and both dies, and includes electrical routing formed directly on landing pads of the dies. A notch is formed in the molding compound layer between the dies to facilitate flexure of the compliant RDL.
    Type: Application
    Filed: November 19, 2020
    Publication date: May 19, 2022
    Inventors: Karthik Shanmugam, Flynn P. Carson, Jun Zhai, Raymundo M. Camenforte, Menglu Li
  • Publication number: 20220071013
    Abstract: Wafer level passive array packages, modules, and methods of fabrication are described. In an embodiment, a module includes a circuit board, and a package mounted on the circuit board in which the package includes a plurality of passive components bonded to a bottom side of the die and a plurality of landing pads of the circuit board.
    Type: Application
    Filed: August 28, 2020
    Publication date: March 3, 2022
    Inventors: Scott D. Morrison, Karthik Shanmugam, Raymundo M. Camenforte, Rakshit Agrawal, Flynn P. Carson, Kiranjit Dhaliwal
  • Publication number: 20220013834
    Abstract: Battery systems according to embodiments of the present technology may include a battery cell having an electrode tab extending from an edge of the battery cell. The systems may also include a module electrically coupled with the battery cell. The module may be characterized by a first surface, a height, and a second surface opposite the first surface. A conductive tab coupled along the first surface of the module may extend from a first end parallel to a plane of the first surface. The conductive tab may be characterized by a curvature proximate a midpoint of the conductive tab. A distal region of the conductive tab may return back across the first surface of the module substantially parallel to the first surface. A distal portion of the electrode tab may be fixedly coupled with the distal region of the conductive tab.
    Type: Application
    Filed: September 24, 2021
    Publication date: January 13, 2022
    Applicant: Apple Inc.
    Inventors: Angelo V. Marasco, Nathan J. Bohney, John M. McCambridge, Antonio Manenti, Laura E. Mayer, Scott L. Gooch, Jonathan C. Wilson, Flynn P. Carson
  • Patent number: 10991659
    Abstract: Packages including substrate-less integrated components and methods of fabrication are described are described. In an embodiment, a packaging method includes attaching a ground structure to a carrier and a plurality of components face down to the carrier and laterally adjacent to the ground structure. The plurality of components are encapsulated within a molding compound, and the carrier is removed exposing a plurality of component terminals and a plurality of ground structure terminals. A plurality of packages are singulated.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: April 27, 2021
    Assignee: Apple Inc.
    Inventors: Flynn P. Carson, Jun Chung Hsu, Meng Chi Lee, Shatki S. Chauhan
  • Publication number: 20200144142
    Abstract: Packages including substrate-less integrated components and methods of fabrication are described are described. In an embodiment, a packaging method includes attaching a ground structure to a carrier and a plurality of components face down to the carrier and laterally adjacent to the ground structure. The plurality of components are encapsulated within a molding compound, and the carrier is removed exposing a plurality of component terminals and a plurality of ground structure terminals. A plurality of packages are singulated.
    Type: Application
    Filed: December 5, 2019
    Publication date: May 7, 2020
    Inventors: Flynn P. Carson, Jun Chung Hsu, Meng Chi Lee, Shatki S. Chauhan
  • Patent number: 10631410
    Abstract: The present disclosure is related to printed circuit board packages and methods of assembly that may be used in the fabrication of electrical devices. Printed circuit board packages may be manufactured by stacking printed circuit board assemblies. Each printed circuit board assembly may have multiple printed circuit boards supported by a resin mold. The printed circuit board assemblies may be shaped to improve space utilization efficiency and to accommodate large electrical components that are attached to the printed circuit board package.
    Type: Grant
    Filed: September 20, 2017
    Date of Patent: April 21, 2020
    Assignee: Apple Inc.
    Inventors: Corey S. Provencher, Meng Chi Lee, Derek J. Walters, Ian A. Spraggs, Flynn P. Carson, Shakti S. Chauhan, Daniel W. Jarvis, David A. Pakula, Jun Zhai, Michael V. Yeh, Alex J. Crumlin, Dennis R. Pyper, Amir Salehi, Vu T. Vo, Gregory N. Stephens
  • Patent number: 10535611
    Abstract: Packages including substrate-less integrated components and methods of fabrication are described are described. In an embodiment, a packaging method includes attaching a ground structure to a carrier and a plurality of components face down to the carrier and laterally adjacent to the ground structure. The plurality of components are encapsulated within a molding compound, and the carrier is removed exposing a plurality of component terminals and a plurality of ground structure terminals. A plurality of packages are singulated.
    Type: Grant
    Filed: February 12, 2016
    Date of Patent: January 14, 2020
    Assignee: Apple Inc.
    Inventors: Flynn P. Carson, Jun Chung Hsu, Meng Chi Lee, Shakti S. Chauhan
  • Patent number: 10522475
    Abstract: A system in package (SiP) is disclosed that uses an EMI shield to inhibit EMI or other electrical interference on the components within the SiP. A metal shield may be formed on an upper surface of an encapsulant encapsulating the SiP. The metal shield may be electrically coupled to a ground layer in a printed circuit board (PCB) to form the EMI shield around the SiP. The metal shield may be electrically coupled to the ground layer using one or more conductive structures located in the encapsulant. The conductive structures may be located on a perimeter of the components in the SiP. The conductive structures may provide a substantially vertical connection between the substrate and the shield on the upper surface of the encapsulant.
    Type: Grant
    Filed: September 26, 2018
    Date of Patent: December 31, 2019
    Assignee: Apple Inc.
    Inventors: Meng Chi Lee, Shakti S. Chauhan, Flynn P. Carson, Jun Chung Hsu, Tha-An Lin
  • Publication number: 20190027445
    Abstract: A system in package (SiP) is disclosed that uses an EMI shield to inhibit EMI or other electrical interference on the components within the SiP. A metal shield may be formed on an upper surface of an encapsulant encapsulating the SiP. The metal shield may be electrically coupled to a ground layer in a printed circuit board (PCB) to form the EMI shield around the SiP. The metal shield may be electrically coupled to the ground layer using one or more conductive structures located in the encapsulant. The conductive structures may be located on a perimeter of the components in the SiP. The conductive structures may provide a substantially vertical connection between the substrate and the shield on the upper surface of the encapsulant.
    Type: Application
    Filed: September 26, 2018
    Publication date: January 24, 2019
    Inventors: Meng Chi Lee, Shakti S. Chauhan, Flynn P. Carson, Jun Chung Hsu, Tha-An Lin
  • Patent number: 10115677
    Abstract: A system in package (SiP) is disclosed that uses an EMI shield to inhibit EMI or other electrical interference on the components within the SiP. A metal shield may be formed on an upper surface of an encapsulant encapsulating the SiP. The metal shield may be electrically coupled to a ground layer in a printed circuit board (PCB) to form the EMI shield around the SiP. The metal shield may be electrically coupled to the ground layer using one or more conductive structures located in the encapsulant. The conductive structures may be located on a perimeter of the components in the SiP. The conductive structures may provide a substantially vertical connection between the substrate and the shield on the upper surface of the encapsulant.
    Type: Grant
    Filed: June 22, 2017
    Date of Patent: October 30, 2018
    Assignee: Apple Inc.
    Inventors: Meng Chi Lee, Shakti S. Chauhan, Flynn P. Carson, Jun Chung Hsu, Tha-An Lin
  • Patent number: 10109593
    Abstract: A system in package (SiP) is disclosed that uses an EMI shield to inhibit EMI or other electrical interference on the components within the SiP. A metal shield may be formed over the SiP. The metal shield may be electrically coupled to a ground layer in a printed circuit board (PCB) to form the EMI shield around the SiP. The substrate of the SiP may include at least some metallization along vertical walls in the end portions of the substrate. The metallization may provide a large contact area for coupling the metal shield to a ground ring coupled to the ground layer in the PCB. The metallization along the vertical walls in the end portions of the substrate may be formed as through-metal vias in a common substrate before singulation to form the SiP.
    Type: Grant
    Filed: November 20, 2015
    Date of Patent: October 23, 2018
    Assignee: Apple Inc.
    Inventors: Meng Chi Lee, Shakti S. Chauhan, Flynn P. Carson, Jun Chung Hsu, Tha-An Lin
  • Publication number: 20180092213
    Abstract: The present disclosure is related to printed circuit board packages and methods of assembly that may be used in the fabrication of electrical devices. Printed circuit board packages may be manufactured by stacking printed circuit board assemblies. Each printed circuit board assembly may have multiple printed circuit boards supported by a resin mold. The printed circuit board assemblies may be shaped to improve space utilization efficiency and to accommodate large electrical components that are attached to the printed circuit board package.
    Type: Application
    Filed: September 20, 2017
    Publication date: March 29, 2018
    Inventors: Corey S. Provencher, Meng Chi Lee, Derek J. Walters, Ian A. Spraggs, Flynn P. Carson, Shakti S. Chauhan, Daniel W. Jarvis, David A. Pakula, Jun Zhai, Michael V. Yeh, Alex J. Crumlin, Dennis R. Pyper, Amir Salehi, Vu T. Vo, Gregory N. Stephens
  • Publication number: 20180082858
    Abstract: Method of forming ultra thin coreless substrates are described. In an embodiment, the method utilizes a debond layer including high and low adhesion surface areas to the carrier substrate, and cutting through the low adhesion surface areas to remove a build-up structure from the carrier substrate. An electrical short layer may be formed as a part of or on the debond layer to facilitate electrical testing of the build-up structure prior to debonding, and aid in the formation a “known good” substrate on a support substrate.
    Type: Application
    Filed: November 29, 2017
    Publication date: March 22, 2018
    Inventors: Jun Chung Hsu, Flynn P. Carson, Kwan-Yu Lai
  • Patent number: 9899239
    Abstract: Method of forming ultra thin coreless substrates are described. In an embodiment, the method utilizes a debond layer including high and low adhesion surface areas to the carrier substrate, and cutting through the low adhesion surface areas to remove a build-up structure from the carrier substrate. An electrical short layer may be formed as a part of or on the debond layer to facilitate electrical testing of the build-up structure prior to debonding, and aid in the formation a “known good” substrate on a support substrate.
    Type: Grant
    Filed: November 6, 2015
    Date of Patent: February 20, 2018
    Assignee: APPLE INC.
    Inventors: Jun Chung Hsu, Flynn P. Carson, Kwan-Yu Lai
  • Publication number: 20170301631
    Abstract: A system in package (SiP) is disclosed that uses an EMI shield to inhibit EMI or other electrical interference on the components within the SiP. A metal shield may be formed on an upper surface of an encapsulant encapsulating the SiP. The metal shield may be electrically coupled to a ground layer in a printed circuit board (PCB) to form the EMI shield around the SiP. The metal shield may be electrically coupled to the ground layer using one or more conductive structures located in the encapsulant. The conductive structures may be located on a perimeter of the components in the SiP. The conductive structures may provide a substantially vertical connection between the substrate and the shield on the upper surface of the encapsulant.
    Type: Application
    Filed: June 22, 2017
    Publication date: October 19, 2017
    Inventors: Meng Chi Lee, Shakti S. Chauhan, Flynn P. Carson, Jun Chung Hsu, Tha-An Lin
  • Patent number: 9721903
    Abstract: A system in package (SiP) is disclosed that uses an EMI shield to inhibit EMI or other electrical interference on the components within the SiP. A metal shield may be formed on an upper surface of an encapsulant encapsulating the SiP. The metal shield may be electrically coupled to a ground layer in a printed circuit board (PCB) to form the EMI shield around the SiP. The metal shield may be electrically coupled to the ground layer using one or more conductive structures located in the encapsulant. The conductive structures may be located on a perimeter of the components in the SiP. The conductive structures may provide a substantially vertical connection between the substrate and the shield on the upper surface of the encapsulant.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: August 1, 2017
    Assignee: Apple Inc.
    Inventors: Meng Chi Lee, Shakti S. Chauhan, Flynn P. Carson, Jun Chung Hsu, Tha-An Lin
  • Publication number: 20170179039
    Abstract: A system in package (SiP) is disclosed that uses an EMI shield to inhibit EMI or other electrical interference on the components within the SiP. A metal shield may be formed on an upper surface of an encapsulant encapsulating the SiP. The metal shield may be electrically coupled to a ground layer in a printed circuit board (PCB) to form the EMI shield around the SiP. The metal shield may be electrically coupled to the ground layer using one or more conductive structures located in the encapsulant. The conductive structures may be located on a perimeter of the components in the SiP. The conductive structures may provide a substantially vertical connection between the substrate and the shield on the upper surface of the encapsulant.
    Type: Application
    Filed: December 21, 2015
    Publication date: June 22, 2017
    Inventors: Meng Chi Lee, Shakti S. Chauhan, Flynn P. Carson, Jun Chung Hsu, Tha-An Lin