Patents by Inventor Fran.cedilla.ois Van Zanten

Fran.cedilla.ois Van Zanten has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Voltage regulator with internal generation of a logic signal
    Patent number: 6084389
    Abstract: The present invention relates to a voltage regulator including at least one input terminal for receiving a supply voltage; a circuit for generating a reference voltage proportional to a desired regulated output voltage; an amplifier of a signal of error between the reference voltage and the output voltage assigned with a coefficient of proportionality; a capacitor connected between an output terminal and the ground, further including means for supplying at least the circuit and the amplifier with the output voltage in case of a deficiency or a disappearing of the supply voltage present on the input terminal.
    Type: Grant
    Filed: October 21, 1997
    Date of Patent: July 4, 2000
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventors: Marc Gens, Fran.cedilla.ois Van Zanten
  • Low-voltage analog switch having selective bulk biasing circuitry
    Patent number: 5933046
    Abstract: An analog switch formed from a MOS transistor switch includes means for applying to the bulk terminal of the transistor switch the voltage of either one of the two main terminals of the transistor switch as a function of the relation between the voltages of said main terminals.
    Type: Grant
    Filed: September 4, 1996
    Date of Patent: August 3, 1999
    Assignee: STMicroelectronics, S.A.
    Inventors: Serge Ramet, Fran.cedilla.ois Van Zanten