Patents by Inventor Francesc Cesc Guim Bernat
Francesc Cesc Guim Bernat has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11601523Abstract: Generally discussed herein are systems, devices, and methods for prefetcher in a multi-tiered memory (DSM) system. A node can include a network interface controller (NIC) comprising system address decoder (SAD) circuitry configured to determine a node identification of a node to which a memory request from a processor is homed, and prefetcher circuitry communicatively coupled to the SAD circuitry, the prefetcher circuitry to determine, based on an address in the memory request, one or more addresses from which to prefetch data, the one or more addresses corresponding to respective entries in a memory of a node on a different network than the NIC.Type: GrantFiled: December 16, 2016Date of Patent: March 7, 2023Assignee: Intel CorporationInventors: Karthik Kumar, Francesc Cesc Guim Bernat, Thomas Willhalm, Martin P Dimitrov, Raj K. Ramanujan
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Patent number: 11095618Abstract: Systems and techniques for AI model and data camouflaging techniques for cloud edge are described herein. In an example, a neural network transformation system is adapted to receive, from a client, camouflaged input data, the camouflaged input data resulting from application of a first encoding transformation to raw input data. The neural network transformation system may be further adapted to use the camouflaged input data as input to a neural network model, the neural network model created using a training data set created by applying the first encoding transformation on training data. The neural network transformation system may be further adapted to receive a result from the neural network model and transmit output data to the client, the output data based on the result.Type: GrantFiled: March 30, 2018Date of Patent: August 17, 2021Assignee: Intel CorporationInventors: Kshitij Arun Doshi, Francesc Cesc Guim Bernat, Suraj Prabhakaran
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Patent number: 10608956Abstract: Described herein are devices and techniques for distributing application data. A device can communicate with one or more hardware switches. The device can receive, from a software stack, a multicast message including a constraint that indicates how application data is to be distributed. The constraint including a listing of the set of nodes and a number of nodes to which the application data is to be distributed. The device may receive, from the software stack, the application data for distribution to a plurality of nodes. The plurality of nodes being a subset of the set of nodes equaling the number of nodes. The device may select the plurality of nodes from the set of nodes. The device also may distribute a copy of the application data to the plurality of nodes based on the constraint. Also described are other embodiments.Type: GrantFiled: December 17, 2015Date of Patent: March 31, 2020Assignee: Intel CorporationInventors: Francesc Cesc Guim Bernat, Karthik Kumar, Thomas Willhalm, Raj K. Ramanujan, Narayan Ranganathan
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Publication number: 20190044918Abstract: Systems and techniques for AI model and data camouflaging techniques for cloud edge are described herein. In an example, a neural network transformation system is adapted to receive, from a client, camouflaged input data, the camouflaged input data resulting from application of a first encoding transformation to raw input data. The neural network transformation system may be further adapted to use the camouflaged input data as input to a neural network model, the neural network model created using a training data set created by applying the first encoding transformation on training data. The neural network transformation system may be further adapted to receive a result from the neural network model and transmit output data to the client, the output data based on the result.Type: ApplicationFiled: March 30, 2018Publication date: February 7, 2019Inventors: Kshitij Arun Doshi, Francesc Cesc Guim Bernat, Suraj Prabhakaran
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Publication number: 20190042955Abstract: Various systems and methods of initiating and performing contextualized AI inferencing, are described herein. In an example, operations performed with a gateway computing device to invoke an inferencing model include receiving and processing a request for an inferencing operation, selecting an implementation of the inferencing model on a remote service based on a model specification and contextual data from the edge device, and executing the selected implementation of the inferencing model, such that results from the inferencing model are provided back to the edge device. Also in an example, operations performed with an edge computing device to request an inferencing model include collecting contextual data, generating an inferencing request, transmitting the inference request to a gateway device, and receiving and processing the results of execution. Further techniques for implementing a registration of the inference model, and invoking particular variants of an inference model, are also described.Type: ApplicationFiled: December 28, 2017Publication date: February 7, 2019Inventors: Joe Cahill, Da-Ming Chiang, Kshitij Arun Doshi, Francesc Cesc Guim Bernat, Suraj Prabhakaran
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Patent number: 10095629Abstract: Generally discussed herein are systems, devices, and methods for local and remote dual address decoding. According to an example a node can include one or more processors to generate a first memory request, the first memory request including a first address and a node identification, a caching agent coupled to the one or more processors, the caching agent to determine that the first address is homed to a remote node remote to the local node, a network interface controller (NIC) coupled to the caching agent, the NIC to produce a second memory request based on the first memory request, and the one or more processors further to receive a response to the second memory request, the response generated by a switch coupled to the NIC, the switch includes a remote system address decoder to determine a node identification to which the second memory request is homed.Type: GrantFiled: September 28, 2016Date of Patent: October 9, 2018Assignee: Intel CorporationInventors: Francesc Cesc Guim Bernat, Kshitij A. Doshi, Steen Larsen, Mark A Schmisseur, Raj K. Ramanujan
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Publication number: 20180176324Abstract: Generally discussed herein are systems, devices, and methods for prefetcher in a multi-tiered memory (DSM) system. A node can include a network interface controller (NIC) comprising system address decoder (SAD) circuitry configured to determine a node identification of a node to which a memory request from a processor is homed, and prefetcher circuitry communicatively coupled to the SAD circuitry, the prefetcher circuitry to determine, based on an address in the memory request, one or more addresses from which to prefetch data, the one or more addresses corresponding to respective entries in a memory of a node on a different network than the NIC.Type: ApplicationFiled: December 16, 2016Publication date: June 21, 2018Inventors: Karthik Kumar, Francesc Cesc Guim Bernat, Thomas Willhalm, Martin P. Dimitrov, Raj K. Ramanujan
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Publication number: 20180089098Abstract: Generally discussed herein are systems, devices, and methods for local and remote dual address decoding. According to an example a node can include one or more processors to generate a first memory request, the first memory request including a first address and a node identification, a caching agent coupled to the one or more processors, the caching agent to determine that the first address is homed to a remote node remote to the local node, a network interface controller (NIC) coupled to the caching agent, the NIC to produce a second memory request based on the first memory request, and the one or more processors further to receive a response to the second memory request, the response generated by a switch coupled to the NIC, the switch includes a remote system address decoder to determine a node identification to which the second memory request is homed.Type: ApplicationFiled: September 28, 2016Publication date: March 29, 2018Inventors: Francesc Cesc Guim Bernat, Kshitij A. Doshi, Steen Larsen, Mark A. Schmisseur, Raj K. Ramanujan
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Publication number: 20170180270Abstract: Described herein are devices and techniques for distributing application data. A device can communicate with one or more hardware switches. The device can receive, from a software stack, a multicast message including a constraint that indicates how application data is to be distributed. The constraint including a listing of the set of nodes and a number of nodes to which the application data is to be distributed. The device may receive, from the software stack, the application data for distribution to a plurality of nodes. The plurality of nodes being a subset of the set of nodes equaling the number of nodes. The device may select the plurality of nodes from the set of nodes. The device also may distribute a copy of the application data to the plurality of nodes based on the constraint. Also described are other embodiments.Type: ApplicationFiled: December 17, 2015Publication date: June 22, 2017Inventors: Francesc Cesc Guim Bernat, Karthik KUMAR, Thomas Willhalm, Raj K. Ramanujan, Narayan Ranganathan