Patents by Inventor Francesco Brandonisio

Francesco Brandonisio has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Digital phase locked loop tracking
    Patent number: 11705912
    Abstract: A tracking system for a digital Phase Locked Loop (PLL), the tracking system including a PLL model configured to emulate an actual internal PLL signal, wherein the emulation is based on another internal PLL signal received from the digital PLL and on an estimated analog PLL parameter of the PLL model; and a tracker configured to compare the emulated internal PLL signal with the actual internal PLL signal, and to update the estimated analog PLL parameter according to a minimization algorithm that minimizes a result of the comparison.
    Type: Grant
    Filed: July 28, 2021
    Date of Patent: July 18, 2023
    Assignee: Infineon Technologies AG
    Inventor: Francesco Brandonisio
  • FREQUENCY GENERATION WITH DYNAMIC SWITCHING BETWEEN CLOSED-LOOP OPERATION AND OPEN-LOOP OPERATION
    Publication number: 20220416798
    Abstract: Some examples relate to a frequency synthesizer. The frequency synthesizer includes an oscillator including an input terminal and an output terminal. A frequency locked-loop or phase-locked loop (FLL/PLL) unit is arranged on a feedback path extending between the output terminal of the oscillator and the input terminal of the oscillator. A switching unit is configured to selectively switch between a first mode of operation in which the feedback path is closed and the FLL/PLL unit is coupled to the input terminal of the oscillator, and a second mode of operation in which the feedback path is open and a ramping unit is coupled to the input terminal of the oscillator while the feedback path is open.
    Type: Application
    Filed: June 29, 2021
    Publication date: December 29, 2022
    Inventors: Francesco Brandonisio, Emanuele Brazzo
  • Frequency generation with dynamic switching between closed-loop operation and open-loop operation
    Patent number: 11533059
    Abstract: Some examples relate to a frequency synthesizer. The frequency synthesizer includes an oscillator including an input terminal and an output terminal. A frequency locked-loop or phase-locked loop (FLL/PLL) unit is arranged on a feedback path extending between the output terminal of the oscillator and the input terminal of the oscillator. A switching unit is configured to selectively switch between a first mode of operation in which the feedback path is closed and the FLL/PLL unit is coupled to the input terminal of the oscillator, and a second mode of operation in which the feedback path is open and a ramping unit is coupled to the input terminal of the oscillator while the feedback path is open.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: December 20, 2022
    Assignee: Infineon Technologies AG
    Inventors: Francesco Brandonisio, Emanuele Brazzo
  • DIGITAL PHASE LOCKED LOOP TRACKING
    Publication number: 20210359691
    Abstract: A tracking system for a digital Phase Locked Loop (PLL), the tracking system including a PLL model configured to emulate an actual internal PLL signal, wherein the emulation is based on another internal PLL signal received from the digital PLL and on an estimated analog PLL parameter of the PLL model; and a tracker configured to compare the emulated internal PLL signal with the actual internal PLL signal, and to update the estimated analog PLL parameter according to a minimization algorithm that minimizes a result of the comparison.
    Type: Application
    Filed: July 28, 2021
    Publication date: November 18, 2021
    Inventor: Francesco Brandonisio
  • Digital phase locked loop tracking
    Patent number: 11133808
    Abstract: A tracking system for a digital Phase Locked Loop (PLL), the tracking system including a PLL model configured to emulate an actual internal PLL signal, wherein the emulation is based on another internal PLL signal received from the digital PLL and on an estimated analog PLL parameter of the PLL model; and a tracker configured to compare the emulated internal PLL signal with the actual internal PLL signal, and to update the estimated analog PLL parameter according to a minimization algorithm that minimizes a result of the comparison.
    Type: Grant
    Filed: April 15, 2019
    Date of Patent: September 28, 2021
    Assignee: Infineon Technologies AG
    Inventor: Francesco Brandonisio
  • DIGITAL PHASE LOCKED LOOP TRACKING
    Publication number: 20200328750
    Abstract: A tracking system for a digital Phase Locked Loop (PLL), the tracking system including a PLL model configured to emulate an actual internal PLL signal, wherein the emulation is based on another internal PLL signal received from the digital PLL and on an estimated analog PLL parameter of the PLL model; and a tracker configured to compare the emulated internal PLL signal with the actual internal PLL signal, and to update the estimated analog PLL parameter according to a minimization algorithm that minimizes a result of the comparison.
    Type: Application
    Filed: April 15, 2019
    Publication date: October 15, 2020
    Inventor: Francesco Brandonisio