Patents by Inventor Francesco Varone
Francesco Varone has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11048936Abstract: An IC card includes a first visible layer comprising a nonmetallic natural material having a physical structure including a unique visual pattern. The IC card further includes a storage device configured to store a reference image of the unique visual pattern. The reference image is a scan of the unique visual pattern. The reference image is configured to be visually compared with the unique visual pattern for authentication. A second layer is included on a bottom surface of the first visible layer. The first visible layer and the second layer are laminated together. Each of the second layer and the nonmetallic natural material of the first visible layer have a same size to define a shape of the IC card.Type: GrantFiled: October 19, 2018Date of Patent: June 29, 2021Assignee: STMICROELECTRONICS S.R.L.Inventor: Francesco Varone
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Publication number: 20190050642Abstract: An IC card includes a first visible layer comprising a nonmetallic natural material having a physical structure including a unique visual pattern. The IC card further includes a storage device configured to store a reference image of the unique visual pattern. The reference image is a scan of the unique visual pattern. The reference image is configured to be visually compared with the unique visual pattern for authentication. A second layer is included on a bottom surface of the first visible layer. The first visible layer and the second layer are laminated together. Each of the second layer and the nonmetallic natural material of the first visible layer have a same size to define a shape of the IC card.Type: ApplicationFiled: October 19, 2018Publication date: February 14, 2019Inventor: Francesco Varone
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Patent number: 10164953Abstract: A security module has an assigned unique electronic identifier. The security module has a communication interface, a non-volatile memory, and a processing unit coupled to the communication interface and the non-volatile memory. One or more unassigned secure domains are formed in the non-volatile memory, and each of the unassigned secure domains has an assigned unique application identifier (AID). Each of the unassigned secure domains is accessible via a respective first security value, and using the respective first security value, each of the unassigned secure domains can be assigned to a service provider before or after the security module is deployed.Type: GrantFiled: September 30, 2015Date of Patent: December 25, 2018Assignee: STMICROELECTRONICS, INC.Inventors: Prasad Golla, Francesco Varone
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Patent number: 10133923Abstract: An IC card includes a first visible layer including a natural material having a unique visual pattern. A storage device is configured to store a digital reference image of the unique visual pattern to be visually compared with the unique visual pattern for authentication. An authentication method based on the IC card is also provided.Type: GrantFiled: April 22, 2013Date of Patent: November 20, 2018Assignee: STMICROELECTRONICS SRL.Inventor: Francesco Varone
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Patent number: 9875048Abstract: A microprocessor of a solid state memory protects the contents of the solid state memory by comparing a sequence of requests for access to physical blocks of the solid state memory with a predetermined sequence of requests to verify the sequence of requests, and by responding to additional requests for access to the physical blocks of the solid state memory to decrypt and transfer requested files stored therein when the sequence of requests equals the predetermined sequence of requests, thereby verifying the sequence of requests. The predetermined sequence of requests is associated with a plurality of virtual files that can be selected, in a particular sequence, to simulate a request for access to physical blocks of the solid state memory, while the predetermined sequence of requests is stored in a configuration file of the solid state memory in correspondence with an identifier of additional protected files.Type: GrantFiled: November 28, 2016Date of Patent: January 23, 2018Assignee: STMICROELECTRONICS S.R.L.Inventor: Francesco Varone
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Patent number: 9665816Abstract: A machine readable code is presented in the form of a graphic seal shape that includes a central region and numerous triangular shapes arranged in a sequence surrounding the central region. A vertex of each triangular shape extends radially outwardly from the central region. The triangular shapes include at least two visually distinct presentations for encoding information based on a pattern of the visually distinct presentations of the triangular shapes in the sequence.Type: GrantFiled: March 21, 2016Date of Patent: May 30, 2017Assignee: STMicroelectronics, Inc.Inventor: Francesco Varone
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Publication number: 20170075608Abstract: A solid state memory unit and method for protecting a solid state memory having a microprocessor are disclosed. The method may include receiving user-input requests for access to blocks of the solid state memory, the blocks of the solid state memory storing ordered virtual files. The user-input requests may have a respective sequence of virtual file position values. The method may include comparing the sequence of virtual file position values with a predetermined sequence of virtual file position values to verify the user-input requests, and when the sequence of virtual file position values equals the predetermined sequence of virtual file position values, responding to, via the microprocessor, requests for access to the blocks of the solid state memory to decrypt and transfer requested files stored. The predetermined sequence may correspond to a predetermined sequence of requests for access to files that can be selected by the user.Type: ApplicationFiled: November 28, 2016Publication date: March 16, 2017Inventor: FRANCESCO VARONE
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Patent number: 9529983Abstract: A solid state memory unit and method for protecting a solid state memory having a microprocessor are disclosed. The method may include receiving user-input requests for access to blocks of the solid state memory, the blocks of the solid state memory storing ordered virtual files. The user-input requests may have a respective sequence of virtual file position values. The method may include comparing the sequence of virtual file position values with a predetermined sequence of virtual file position values to verify the user-input requests, and when the sequence of virtual file position values equals the predetermined sequence of virtual file position values, responding to, via the microprocessor, requests for access to the blocks of the solid state memory to decrypt and transfer requested files stored. The predetermined sequence may correspond to a predetermined sequence of requests for access to files that can be selected by the user.Type: GrantFiled: June 25, 2012Date of Patent: December 27, 2016Assignee: STMICROELECTRONICS S.R.L.Inventor: Francesco Varone
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Publication number: 20160099923Abstract: A security module has an assigned unique electronic identifier. The security module has a communication interface, a non-volatile memory, and a processing unit coupled to the communication interface and the non-volatile memory. One or more unassigned secure domains are formed in the non-volatile memory, and each of the unassigned secure domains has an assigned unique application identifier (AID). Each of the unassigned secure domains is accessible via a respective first security value, and using the respective first security value, each of the unassigned secure domains can be assigned to a service provider before or after the security module is deployed.Type: ApplicationFiled: September 30, 2015Publication date: April 7, 2016Inventors: Prasad Golla, Francesco Varone
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Patent number: 9239588Abstract: A clock frequency of a clock signal is calculated, with the clock signal being received by an IC card from a terminal or an internal clock within the IC card. A first time-stamp is received from the terminal, and a first value of the timer is set. The timer of the IC card is started when the first time-stamp is received. A second time-stamp is received, and a second value of the timer is read when the second time-stamp is received. The frequency is calculated by comparing a difference between the second and the first timer values, and a difference between the second and the first time stamps.Type: GrantFiled: December 23, 2011Date of Patent: January 19, 2016Assignee: STMICROELECTRONICS INTERNATIONAL N.V.Inventors: Amedeo Veneroso, Vitantonio Distasio, Francesco Varone
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Patent number: 9235345Abstract: A method for controlling a loss of reliability of a non-volatile memory (NVM) included in an integrated circuit card (ICC) may include determining whether the NVM is reliable at the operating system (OS) side of the ICC, and generating an event associated with the reliability of the NVM at the OS side for an application of the ICC, if the NVM is determined to be unreliable.Type: GrantFiled: December 23, 2011Date of Patent: January 12, 2016Assignee: STMICROELECTRONICS INTERNATIONAL N.V.Inventors: Amedeo Veneroso, Francesco Varone, Pasquale Vastano, Vitantonio Distasio
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Patent number: 9223894Abstract: A method for generating at least one portion of a data display layout on a display of a device equipped with at least one smart card may include generating a code sequence to define at least one portion of the data display layout and to store the code sequence in the at least one smart card. Each code of the code sequence may have a first portion including a first numerical code, and a second portion including a second numerical code. The first numerical code may correspond to a coded primitive action suitable to produce at least one part of the display layout. The second numerical code may correspond to a coded item of data correlated with a respective primitive action. The method may further include processing the code sequence to generate, on the device display at least one part of the display layout with the items of data in predefined positions of the layout.Type: GrantFiled: May 28, 2010Date of Patent: December 29, 2015Assignee: STMICROELECTRONICS INTERNATIONAL N.V.Inventors: Francesco Varone, Amedeo Veneroso
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Patent number: 9143922Abstract: A method may be for controlling communication between a UICC, a handset including the UICC, and an external device associated with an external application running outside the handset. The method may include switching on the UICC by the handset, executing a first initialization procedure by the handset to establish a first communication session between the handset and the UICC, establishing a second communication session between the UICC and the external device, and executing a second initialization procedure between the external device and the UICC. The method may include retrieving an attribute of the handset by the UICC after completing the first initialization procedure, retrieving an attribute of the external device via the handset by the UICC after the completing the second initialization procedure, and comparing the attribute of the handset with the attribute of the external device to distinguish the second communication session from the first communication session.Type: GrantFiled: December 29, 2011Date of Patent: September 22, 2015Assignee: STMICROELECTRONICS INTERNATIONAL N.V.Inventors: Amedeo Veneroso, Francesco Varone, Angelo Castaldo
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Patent number: 9129139Abstract: A solid state memory including a processor and a method for protecting the digital contents of the solid state memory. The microprocessor inserts at least an interruption during a copying or a reading of the digital contents and proceeds with the copying or reading only subsequent to a verification of a PIN or other user action. In particular, the verification provides control to ensure that the PIN is inserted manually. Access may be prevented if a time elapsed between the interruption and inputting of a PIN is shorter than a threshold time representing a speed of manual input, or if the PIN does not correspond to a sequence of requests for access to selectable files, which may be virtual files. The interruption may comprise substituting altered or cryptographic data if verification fails, or reproduction of an audio or visual message to be understood by the user.Type: GrantFiled: June 25, 2012Date of Patent: September 8, 2015Assignee: STMICROELECTRONICS S.R.L.Inventors: Francesco Varone, Amedeo Veneroso
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Patent number: 9083867Abstract: A device for assigning a geographical position to a picture may include a photo camera module for taking the picture, a satellite positioning system receiver module for identifying geographical coordinates when the picture is taken, and a cryptographic module to sign the picture and the corresponding geographical coordinates. The device may store the signed picture and the corresponding geographical coordinates as certified geographical position of the picture.Type: GrantFiled: April 24, 2013Date of Patent: July 14, 2015Assignee: STMICROELECTRONICS S.R.L.Inventors: Marco Alfarano, Francesco Varone
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Patent number: 8745407Abstract: A virtual machine or hardware processor for an IC-card portable electronic device includes a non-volatile memory unit, a remote decryption unit, and associated objects for storing an executable program in an encrypted format in the non-volatile memory. The IC-card stores a licence key to encrypt and decrypt the executable program through an IC-card interface. The IC-card interface extracts and encrypts the operands of the plain executable program into encrypted operands so as to not limit performance. The remote decryption unit detects if an instruction contains encrypted operands, and queries a decryption to the IC-card interface. The IC-card interface decrypts the encrypted operands and re-encrypts the just decrypted operands into obscured operands through a dynamic obscuration key.Type: GrantFiled: May 2, 2006Date of Patent: June 3, 2014Assignee: STMicroelectronics N.V.Inventors: Francesco Varone, Pasquale Vastano, Amedeo Veneroso
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Publication number: 20140025869Abstract: The present invention relates to a method and system for controlling a number of writing cycles supported by a cell or portion (11) of a non volatile memory (4) of an IC Card (10), including the steps of counting write accesses to the memory portion (11) and storing a first counter (21) of the write accesses in another portion (21) of said non volatile memory (4). The method comprises coupling the first counter (21) to a second counter or value (31) associated to a RAM (4) (Random Access Memory) of the IC Card (10), wherein the second counter or value (31) is updated each time the write accesses occur on said cell or portion (11) to be controlled and the first counter (21) is written in the another portion of non volatile memory only when the second counter or value (21) corresponds to a predetermined value.Type: ApplicationFiled: December 23, 2011Publication date: January 23, 2014Applicant: STMICROELECTRONICS INTERNATIONAL NVInventors: Amedeo Veneroso, Francesco Varone, Vitantonio Distasio, Pasquale Vastano
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Publication number: 20130332766Abstract: A clock frequency of a clock signal is calculated, with the clock signal being received by an IC card from a terminal or an internal clock within the IC card. A first time-stamp is received from the terminal, and a first value of the timer is set. The timer of the IC card is started when the first time-stamp is received. A second time-stamp is received, and a second value of the timer is read when the second time-stamp is received. The frequency is calculated by comparing a difference between the second and the first timer values, and a difference between the second and the first time stamps.Type: ApplicationFiled: December 23, 2011Publication date: December 12, 2013Applicant: STMicroelectronics International N.V.Inventors: Vitantonio Distasio, Francesco Varone, Amedeo Veneroso
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Publication number: 20130290617Abstract: A method for controlling a loss of reliability of a non-volatile memory (NVM) included in an integrated circuit card (ICC) may include determining whether the NVM is reliable at the operating system (OS) side of the ICC, and generating an event associated with the reliability of the NVM at the OS side for an application of the ICC, if the NVM is determined to be unreliable.Type: ApplicationFiled: December 23, 2011Publication date: October 31, 2013Applicant: STMicroelectronics International N.V.Inventors: Amedeo Veneroso, Francesco Varone, Pasquale Vastano, Vitantonio Distasio
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Patent number: RE45769Abstract: An IC Card comprises a first device, including a first processor and a first memory unit, to communicate with a handset, and a second device. The second device includes a second processor and a second memory unit, to communicate via a wireless communication with an electronic apparatus external to the handset, the second device providing predetermined services. Each predetermined service is programmed to receive a wireless message from a respective electronic apparatus, to execute a predetermined elaboration operation, and to return a result to the respective electronic apparatus. The second memory unit stores a plurality of additional programs for executing additional elaborations operations, each program being associated to one of the predetermined services. The second device has a run-time environment for executing the additional programs when the corresponding predetermined services receives the wireless message.Type: GrantFiled: March 24, 2014Date of Patent: October 20, 2015Assignee: STMICROELECTRONICS INTERNATIONAL N.V.Inventors: Francesco Varone, Amedeo Veneroso