Patents by Inventor Francis Bredin

Francis Bredin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8626418
    Abstract: A method and system for monitoring speed of a vehicle moving along a road that includes risk zones. The method determines: road conditions for each risk zone; a threshold speed of each risk zone based on the road conditions and on a distance to a posted speed limit within a high risk zone; a geographical position of the vehicle, a current risk zone in which the vehicle is moving based on the stored geographical position of the vehicle; and a current speed of the vehicle moving in the current risk zone which exceeds the threshold speed of a particular risk zone, resulting in performing a subsequent action (triggering an alarm within the vehicle, presenting a message to a driver in the vehicle, and/or automatically regulating the speed of the vehicle). The action is specific to the particular risk zone and dependent on the road conditions.
    Type: Grant
    Filed: September 18, 2006
    Date of Patent: January 7, 2014
    Assignee: International Business Machines Corporation
    Inventors: Bertrand Boulet, Francis Bredin
  • Patent number: 8019631
    Abstract: A computer implemented method for automatically identifying one or more metrics for performing a CMMI evaluation of an entity, wherein the CMMI evaluation is performed at a particular CMMI level and the method comprises the steps of accessing an electronic database of a plurality of candidate metrics, providing a first list of requirement elements to define a set of specific requirements of the entity, providing a second list of requirement elements to define a set of general requirements of the business field of the entity, searching for a first subset of metrics from the plurality of candidate metrics that match the first list and second list of requirement elements, searching for a second subset of metrics from the first subset of metrics that match with the CMMI level, and outputting the second set of metrics in a user-friendly format suitable for the CMMI evaluation.
    Type: Grant
    Filed: December 7, 2006
    Date of Patent: September 13, 2011
    Assignee: International Business Machines Corporation
    Inventors: Francis Bredin, Philippe Desbarbieux
  • Publication number: 20110010042
    Abstract: A method and system for monitoring speed of a vehicle moving along a road that includes risk zones. The method determines: road conditions for each risk zone; a threshold speed of each risk zone based on the road conditions and on a distance to a posted speed limit within a high risk zone; a geographical position of the vehicle, a current risk zone in which the vehicle is moving based on the stored geographical position of the vehicle; and a current speed of the vehicle moving in the current risk zone which exceeds the threshold speed of a particular risk zone, resulting in performing a subsequent action (triggering an alarm within the vehicle, presenting a message to a driver in the vehicle, and/or automatically regulating the speed of the vehicle). The action is specific to the particular risk zone and dependent on the road conditions.
    Type: Application
    Filed: December 15, 2005
    Publication date: January 13, 2011
    Inventors: Bertrand Boulet, Francis Bredin
  • Patent number: 7644996
    Abstract: A system and method for controlling the unintended rolling of a rolling stock, the rolling stock having a driver park brake, and an in-vehicle network for signals transmission, the method comprises the steps of selecting among the signals transmitted over the in-vehicle network, a set of predefined signals, then analyzing the status of the selected signals to determine a regulation process to be applied to the rolling stock, and monitoring the regulation process.
    Type: Grant
    Filed: June 8, 2006
    Date of Patent: January 12, 2010
    Assignee: International Business Machines Corporation
    Inventor: Francis Bredin
  • Publication number: 20070156657
    Abstract: A computer implemented method for automatically identifying one or more metrics for performing a CMMI evaluation of an entity, wherein the CMMI evaluation is performed at a particular CMMI level and the method comprises the steps of accessing an electronic database of a plurality of candidate metrics, providing a first list of requirement elements to define a set of specific requirements of the entity, providing a second list of requirement elements to define a set of general requirements of the business field of the entity, searching for a first subset of metrics from the plurality of candidate metrics that match the first list and second list of requirement elements, searching for a second subset of metrics from the first subset of metrics that match with the CMMI level, and outputting the second set of metrics in a user-friendly format suitable for the CMMI evaluation.
    Type: Application
    Filed: December 7, 2006
    Publication date: July 5, 2007
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Francis Bredin, Philippe Desbarbieux
  • Publication number: 20070016353
    Abstract: A system and method for controlling the unintended rolling of a rolling stock, the rolling stock having a driver park brake, and an in-vehicle network for signals transmission, the method comprises the steps of selecting among the signals transmitted over the in-vehicle network, a set of predefined signals, then analyzing the status of the selected signals to determine a regulation process to be applied to the rolling stock, and monitoring the regulation process.
    Type: Application
    Filed: June 8, 2006
    Publication date: January 18, 2007
    Applicant: International Business Machines Corporation
    Inventor: Francis Bredin
  • Patent number: 6807552
    Abstract: A non-integer fractional divider is disclosed. According to the present invention, the non-integer fractional divider comprises means for dividing a reference clock signal having a period ‘P’ by a non-integer ratio ‘K’. In a preferred embodiment, the divider comprises means for receiving a plurality ‘N’ of clock signals issued from the reference clock signal and wherein each clock signal is equally phase shifted by a ‘P/N’ delay one over the other. Selection means are coupled to the receiving means for selecting a first and a second clock signals between the plurality ‘N’ of clock signals. The selected clock signals are such that the phase shift delay between the two selected clock signals is representative of the non-integer value of the ratio ‘K’. The selected clock signals are combined into combining means to generate a clock signal being phase shifted by the non-integer part of the non-integer ratio.
    Type: Grant
    Filed: August 23, 2001
    Date of Patent: October 19, 2004
    Assignee: International Business Machines Corporation
    Inventors: Francis Bredin, Bertrand Gabillard
  • Patent number: 6748408
    Abstract: A non-integer fractional divider divides a reference clock signal having period P by a non-integer ratio K. The divider includes multiplexers to receive a plurality N of clock signals wherein each clock signal is equally phase shifted by a P/N delay. Incrementers coupled to the multiplexers select first and second clock signals between the N clock signals. Such that the phase shift delay between the two selected clock signals is representative of the non-integer value of K. The selected clock signals are combined to output a divided clock signal. The enabling time of each selected clock signal is respectively representative of the duration of the low level and the high level of the divided clock signal.
    Type: Grant
    Filed: October 20, 2000
    Date of Patent: June 8, 2004
    Assignee: International Buisness Machines Corporation
    Inventors: Francis Bredin, Bertrand Gabillard, Francois Auguste Roger Meunier
  • Publication number: 20020116423
    Abstract: A non-integer fractional divider is disclosed. According to the present invention, the non-integer fractional divider comprises means for dividing a reference clock signal having a period ‘P’ by a non-integer ratio ‘K’. In a preferred embodiment, the divider comprises means for receiving a plurality ‘N’ of clock signals issued from the reference clock signal and wherein each clock signal is equally phase shifted by a ‘P/N’ delay one over the other. Selection means are coupled to the receiving means for selecting a first and a second clock signals between the plurality ‘N’ of clock signals. The selected clock signals are such that the phase shift delay between the two selected clock signals is representative of the non-integer value of the ratio ‘K’. The selected clock signals are combined into combining means to generate a clock signal being phase shifted by the non-integer part of the non-integer ratio.
    Type: Application
    Filed: August 23, 2001
    Publication date: August 22, 2002
    Applicant: International Business Machines Corporation
    Inventors: Francis Bredin, Bertrand Gabillard
  • Patent number: 6286072
    Abstract: A synchronization circuit for use in a bridge connecting an emitter bus operating on an emitter clock frequency to a receiver bus operating on a receiver clock frequency is provided. The synchronization circuit is responsive to a control signal generated by memory status means coupled to a memory which temporarily stores data transmitted from the emitter bus to the receiver bus. The control signal representative of the status of the memory is reflecting asynchronous read and write operations within the memory. The resultant signal output from the synchronization circuit is a one clock synchronized signal such that rising and falling transitions are synchronized to the receiver bus clock frequency.
    Type: Grant
    Filed: August 10, 1998
    Date of Patent: September 4, 2001
    Assignee: International Business Machines Corporation
    Inventors: Francis Bredin, Claude Sitbon
  • Patent number: 6219744
    Abstract: An interrupt masker for use in an interrupt handler which receives interrupt request signals in the form of edge detection or level assertion is disclosed. The interrupt masker comprises interrupt detection means for detecting edge transitions of interrupt request signals. The interrupt masker also comprises a polarity detection means for detecting edge transitions of a polarity control signal which is inverted for each inversion polarity request. A filtering means which is coupled to the interrupt detection means and to the polarity detection means generates an interrupt request pulse according to the assertion of the polarity control signal. The interrupt request pulse is generated in response of either rising or falling edge transitions of the interrupt request signal.
    Type: Grant
    Filed: March 18, 1999
    Date of Patent: April 17, 2001
    Assignee: International Business Machines Corporation
    Inventors: Francis Bredin, Gerard Boudon, Jean-Michel Proust
  • Patent number: 5809260
    Abstract: Blocks of data are transferred in burst mode from a first device attached to a first bus, to a second device attached to a second bus having time multiplexed address/data lines. A bridge circuit includes an address register, which is coupled to the first bus, a circuit for incrementing the address register, and an output register coupled to the address/data lines of the second bus. In an aborted burst mode transfer of a block of data from one device to the other in which a "last" data byte in the block was successfully transferred, but a "next" byte of data was not successfully transferred, the system provides for an efficient retry of the transfer of the aborted data block. This efficient retry is accomplished in part by swapping the information in the address register of the bridge circuit with the information in its output register, such that the output register contains the address of the "next" data byte.
    Type: Grant
    Filed: September 19, 1996
    Date of Patent: September 15, 1998
    Assignee: International Business Machines Corp.
    Inventor: Francis Bredin
  • Patent number: 5359563
    Abstract: A memory system with adaptable redundancy comprises address decoding means (200) for the selection of one of the rows R.sub.1 to R.sub.2 (n+1) in the memory array, according to the binary value of address A.sub.0, A.sub.1, . . . A.sub.nn incoming on bus 102. Block 200 comprises 2.sup.(n+1) blocks 201 being able to drive an activation signal on leads R.sub.1 to R.sub.2 (n+1), and having an output connected to a lead 206.Block 205 is able to drive an activation signal on lead RR according to signals present on leads 107 and 206, so as to select redundant row RR.sub.1 without the use of a redundant address decoder.
    Type: Grant
    Filed: March 9, 1992
    Date of Patent: October 25, 1994
    Assignee: International Business Machines Corporation
    Inventors: Francis Bredin, Thierry Cantiant
  • Patent number: 5204560
    Abstract: A combined sense amplifier and latching circuit receives an input signal (VIN) at an input terminal (22). A sense amplifier includes a gated-loop type master latch (ML) having two cascaded inverters (I12, I13) with a common node (I) coupled therebetween and a control device (TG4) in the master latch loop controlled by a gating signal (55A). A reference voltage generator generates a reference voltage (VREF). The two inverters are biased between a first supply voltage (Vdd) having a magnitude greater than the reference voltage and either a second supply voltage (GND) or the reference voltage depending on the value of the gating signal. The input terminal is connected to the input of one of the inverters. A gated-loop slave latch (SL) is connected in series with the sense amplifier and includes two cascaded inverters (I14, I15) with a common node (M) coupled therebetween and a control device (P15) in the slave latch loop controlled by the gating signal.
    Type: Grant
    Filed: October 4, 1991
    Date of Patent: April 20, 1993
    Assignee: International Business Machines Corporation
    Inventors: Francis Bredin, Thierry Cantiant, Pierre Coppens