Abstract: A pixel data memory is provided for use with an information display system having a raster scan screen divided into a plurality of pixels each of which represents a separate area of the screen. The memory comprises a multiple-bit memory plane (13) capable of providing a plurality of separate bit locations each of which may correspond to a separate display pixel and arranged to store pixel data in the form of a plurality of multiple-bit words. The memory plane (13) comprises a number of memory chips each capable of storing a separate bit of each of the multiple-bit words. An address generator (10) is operable to generate the addresses of required individual bit locations in the memory plane. A number of separate control circuits (14) are provided, equal to the number of bits in each word. Each control circuit (14) is associated with a separate memory chip and is responsive to a generated address defining a bit location on that chip to access the pixel data identified by the bit at that location.

Abstract: An information display system includes a raster-scan display screen DS and an information store IS for storing information to be displayed on the screen. The store has a capacity greater than the maximum amount of information which may be displayed at any one time. Display controller DC is operable to generate a succession of screen addresses of successive areas of the display screen DS, and mapping memory MU is provided to translate each screen address into a store address indicating the location in the information store IS of the information to be displayed in that area of the display screen. Display logic DL is provided to produce from the store output the necessary signals for activating the display. Map changes MC are provided to enable the translations effected by the mapping memory MU to be varied as required to change the display. One or more input devices ID allow information to be written into the display store.