Patents by Inventor Franck J. Poirot

Franck J. Poirot has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5910958
    Abstract: The disclosure concerns the automatic generation of test vectors for a sequential circuit which is expressible as a finite state machine having a combinatorial part and sequential elements. A functional generation of test vectors is performed using a high level functional specification of the finite state machine. Fault simulation may be used to provide a list of possible faults not covered by the vectors generated functionally. A structural generation performed on the combinatorial part in respect of the listed faults provides test vectors for all the remaining faults except those which are due to redundancy in the circuit. The high level specification can be modified for the purpose of test generation without modifying its functionality to add transitions corresponding to the structurally generated vectors and the functional generation may be performed on the modified specification to provided a final set of test vectors.
    Type: Grant
    Filed: October 6, 1995
    Date of Patent: June 8, 1999
    Assignee: VLSI Technology, Inc.
    Inventors: Christian Y. Jay, Franck J. Poirot
  • Patent number: 5359537
    Abstract: A method of automatic synthesis of a very large scale integrated circuit includes controlling the decomposition process in accordance with a reference order of inputs in a lexicographical expression of a Boolean function. The process improves the routability of the circuit by a reduction of complexity of wiring between cells of the circuit and external wiring to blocks connected to the synthesized circuit. The process also promotes an increase in speed and/or a decrease in area of the circuit, avoids ineffective decompostions which would be broken later during an optimization process and also helps to speed up the entire process of synthesis.
    Type: Grant
    Filed: May 14, 1990
    Date of Patent: October 25, 1994
    Assignee: VLSI Technology, Inc.
    Inventors: Gabriele Saucier, Franck J. Poirot
  • Patent number: 5282148
    Abstract: A process of realizing large scale integrated circuits by means of a programmed data processor includes minimizing timing delays in the technology mapping phase by employing algorithms which are based on a linear model in terms of number of inputs and a load capacitance of a gating function and which permit a decomposition of the gating function into gates having m inputs and [(n-m)+1] inputs wherein m is greater than two. Balanced decompositions may be allowed in appropriate conditions.
    Type: Grant
    Filed: May 23, 1989
    Date of Patent: January 25, 1994
    Assignee: VLSI Technology, Inc.
    Inventors: Franck J. Poirot, Pierre G. Paulin