Patents by Inventor Frank Ansorge

Frank Ansorge has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8481864
    Abstract: The invention relates to a method for producing a functional assembly as well as a functional assembly. According to the inventive method, at least one first material and a second material which are provided with different properties are applied layer by layer, partially in some parts, so as to create an encapsulation from the first material and a strip conductor structure from the second material, one or several functional units being embedded in the layer structure and being contacted with the strip conductor structure when the materials are applied. The disclosed method makes it possible to carefully structure a unit while offering a great degree of creative freedom.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: July 9, 2013
    Assignee: Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V.
    Inventors: Kathrin Badstübner, Frank Ansorge
  • Patent number: 7485500
    Abstract: A chip module comprises a chip with a chip contact, an insulating structure, which covers the chip and the chip contact at least partly, and a spare contact at an external surface of the insulating structure and a conductive trace for electrically connecting the chip contact to the spare contract.
    Type: Grant
    Filed: October 26, 2006
    Date of Patent: February 3, 2009
    Assignee: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.
    Inventors: Gabriele Wegerer, Christine Kallmayer, Frank Ansorge, Christian Rebholz
  • Publication number: 20080282527
    Abstract: A process for producing an object having at least two component parts (3, 4) which can move relative to one another is proposed. This involves preparing geometrical data of the entire object for a rapid prototyping process, with a predetermined minimum spacing between the moving parts being taken into consideration. According to the predetermined geometrical data, a first material as support material and a second material as material for the component parts are applied in layers, the support material filling gaps including those constituting the minimum spacing between the respective material for the component parts. Following completion of the layered construction, the support material is removed.
    Type: Application
    Filed: June 2, 2006
    Publication date: November 20, 2008
    Inventors: Julian Beck, Kathrin Badstubner, Frank Ansorge
  • Publication number: 20080196928
    Abstract: The invention relates to a method for producing a functional assembly as well as a functional assembly. According to the inventive method, at least one first material and a second material which are provided with different properties are applied layer by layer, partially in some parts, so as to create an encapsulation from the first material and a strip conductor structure from the second material, one or several functional units being embedded in the layer structure and being contacted with the strip conductor structure when the materials are applied. The disclosed method makes it possible to carefully structure a unit while offering a great degree of creative freedom.
    Type: Application
    Filed: June 30, 2006
    Publication date: August 21, 2008
    Applicant: Fraunhofer-Gesellschaft Zur Forderung Der Angewan dten Forschung E.V.
    Inventors: Kathrin Badstubner, Frank Ansorge
  • Publication number: 20070134848
    Abstract: A chip module comprises a chip with a chip contact, an insulating structure, which covers the chip and the chip contact at least partly, and a spare contact at an external surface of the insulating structure and a conductive trace for electrically connecting the chip contact to the spare contract.
    Type: Application
    Filed: October 26, 2006
    Publication date: June 14, 2007
    Inventors: Gabriele Wegerer, Christine Kallmayer, Frank Ansorge, Christian Rebholz
  • Patent number: 6651891
    Abstract: The present invention relates to a method of producing a contactless chip card. In a first step of the method, a card body with one or a plurality of recesses on one card body side is produced from a theremoplastic material, preferably by injection moulding. Bumps being formed on the base surface of the recesses. Subsequently, conductor tracks corresponding to a coil as a conductor track pattern are impressed directly onto surface areas of the card body side including the recesses using a hot impressing technique. The conductor tracks are impressed especially also onto surface areas inside the recesses such that same extends across the bumps. One or a plurality of chips are then aligned in the recesses and contacted with the conductor tracks in the recesses which extend across the bumps. The method according to the present invention is advantageous insofar as it permits a simple production of a chip card, which requires only a few method steps and is therefore also economical.
    Type: Grant
    Filed: June 28, 2000
    Date of Patent: November 25, 2003
    Assignees: Smart Pac GmbH - Technology Services
    Inventors: Elke Zakel, Rolf Aschenbrenner, Frank Ansorge, Paul Kasulke
  • Patent number: 6277660
    Abstract: Method and apparatus for the testing of substrates which are provided with a wiring structure, in particular, chips (21), in conjunction with which, by means of a solder-deposit carrier (25) which is provided with a structured, electrically conductive coating (12) with bond pads (17) for the arranging of solder deposits (28) and their transfer to correspondingly arranged bond pads (22) of a substrate (21), an electrical check of the wiring structure of the substrate (21) takes place during the transfer of the solder deposits (28).
    Type: Grant
    Filed: February 3, 2000
    Date of Patent: August 21, 2001
    Assignee: Fraunhofer-Gesellschaft zur Forderung der angewandten Forschung e.V.
    Inventors: Elke Zakel, Frank Ansorge, Paul Kasulke, Andreas Ostmann, Rolf Aschenbrenner, Lothar Dietrich
  • Patent number: 6211571
    Abstract: Method and apparatus for the testing of substrates which are provided with a wiring structure, in particular, chips (21), in conjunction with which, by means of a solder-deposit carrier (25) which is provided with a structured, electrically conductive coating (12) with bond pads (17) for the arranging of solder deposits (28) and their transfer to correspondingly arranged bond pads (22) of a substrate (21), an electrical check of the wiring structure of the substrate (21) takes place during the transfer of the solder deposits (28).
    Type: Grant
    Filed: September 6, 1996
    Date of Patent: April 3, 2001
    Assignee: Fraunhofer-Gesellschaft zur Forderung der angewandten Forschung
    Inventors: Elke Zakel, Frank Ansorge, Paul Kasulke, Andreas Ostmann, Rolf Aschenbrenner, Lothar Dietrich