Abstract: A computer implemented method for sampling call stack information. Responsive to identifying a set of interrupts, a determination is made as to whether all processors in a plurality of processors have generated the set of interrupts. A number of addresses are identified for a set of interrupted threads identified by the set of interrupts response to a determination that all of the processors have generated the set of interrupts. A determination is made as to whether the identified address falls within a set of address ranges. Responsive to a determination that the identified address falls within the set of address ranges, a sampler thread is notified to obtain call stack information.

Abstract: A computer implemented method, apparatus, and computer program code for profiling an application. Execution of an application is monitored. A set of metrics relating to execution of the application occurring during monitoring execution of the application are collected to form a set of observed metrics. An execution environment overhead occurring with respect to the set of observed events is identified to form an identified execution environment overhead. The set of observed metrics is adjusted using the identified execution environment overhead to form a set of calibrated metrics.

Abstract: A method and apparatus for identifying a minimum call tree data structure from a plurality of call tree data structures are provided. With the apparatus and method, call tree data structures are generated for two or more executions of a build of a computer program. The apparatus and method perform a “tree-minimization” operation in which the two or more call trees generated during runs of the computer program are walked and only those nodes that are present in each of the tree data structures are maintained in a minimized tree data structure. In addition, the minimum values for these common nodes are maintained in the minimized tree data structure. In this way, asynchronous events are removed from the minimum tree data structure and analysis may focus on those areas of the computer program that are consistent between runs of the computer program.

Abstract: A process registers a system management event in an application configuration database. Responsive to detecting the registered system management event during execution of one application of the set of applications, the process identifies applications of the set of applications associated with the registered system management event that are executing. The process then terminates the applications of the set of applications associated with the registered system management event that are executing. Responsive to terminating the applications of the set of applications associated with the registered system managing event that are executing, the process then executes a handler that processes the registered system management event.

Abstract: Illustrative embodiments cover a data processing system for processing instructions and monitoring accesses to memory location ranges. An instruction for execution is identified. A determination is made as to whether the instruction is within a contiguous range of instructions. Execution information relating to the instruction is identified if the instruction is within the contiguous range of instructions. With memory location accesses, an access to a memory location is identified. A determination of whether the memory location is within a contiguous range of memory locations is made. Access information is identified if the memory location is within the contiguous range of memory locations.

Abstract: A computer implemented method, apparatus, and computer program product for executing instructions. A determination is made as to whether a set of instructions are a set of instrumentation instructions in response to identifying the set of instructions in instructions for execution. A further determination is made as to whether a processor executing the instructions is in an instrumentation mode if the set of instructions are instrumentation instructions. The processor executes the set of instrumentation instructions only if the processor is in the instrumentation mode.

Abstract: Hardware assist to autonomically patch code. The present invention provides hardware microcode to a new type of metadata to selectively identify instructions to be patched for specific performance optimization functions. The present invention also provides a new flag in the machine status register (MSR) to enable or disable a performance monitoring application or process to perform code-patching functions. If the code patching function is enabled, the application or process may patch code at run time by associating the metadata with the selected instructions. The metadata includes pointers pointing to the patch code block code. The program code may be patched autonomically without modifying original code.

Abstract: A method and apparatus for automatically performing regression processing on trace data are provided. With the apparatus and method, call tree data structures are generated for two or more executions of two or more builds of a computer program. The apparatus and method perform a “tree-minimization” operation on each set of call tree data structures for each of the builds to generate minimized call tree data structures for each build of the computer program. The minimized call tree data structures are then subtracted from one another to generate a subtracted minimized call tree data structure. From this subtracted minimized call tree data structure, the portions of the computer program that are different from build to build and which appreciably and consistently affect the difference in execution of the computer program from build to build may be identified.

Abstract: A method and apparatus in a data processing system for measuring events associated with the execution of instructions are provided. Instructions are received at a processor in the data processing system. If a selected indicator is associated with the instruction, counting of each event associated with the execution of the instruction is enabled. In some embodiments, the performance indicators, counters, thresholds, and other performance monitoring structures may be stored in a page table that is used to translate virtual addresses into physical storage addresses. A standard page table is augmented with additional fields for storing the performance monitoring structures. These structures may be set by the performance monitoring application and may be queried and modified as events occur that require access to physical storage.

Abstract: Call stack information is sampled. A flag associated with a target thread is set in a memory work area associated with a virtual machine in response to an interrupt. Monitoring for an event takes place during execution of a plurality of threads created by the virtual machine. A determination is made as to whether the flag is set in response to an occurrence of the event. If the flag is set, the virtual machine makes a call out to a profiler which initiates sampling of the call stack information in response to the flag being set.

Abstract: Hardware assist to autonomically patch code. The present invention provides hardware microcode to a new type of metadata to selectively identify instructions to be patched for specific performance optimization functions. The present invention also provides a new flag in the machine status register (MSR) to enable or disable a performance monitoring application or process to perform code-patching functions. If the code patching function is enabled, the application or process may patch code at run time by associating the metadata with the selected instructions. The metadata includes pointers pointing to the patch code block code. The program code may be patched autonomically without modifying original code.

Abstract: A method, apparatus, and computer instructions for providing hardware assistance to prefetch data during execution of code by a process or in the data processing system. In response to loading an instruction in the code into a cache, a determination is made by a processor unit as to whether a prefetch indicator is associated with the instruction. In response to the prefetch indicator being associated with the instruction, a pointer to a data structure identified by the prefetch indicator is selectively prefetched into the cache in the processor.

Abstract: A computer implemented method, apparatus, and computer usable program code for sampling call stack information. An event is monitored during execution of a plurality of threads executed by a plurality of processors. In response to an occurrence of the event, a thread is identified in the plurality of threads to form an identified thread. A plurality of sampling threads is woken, wherein a sampling thread within the plurality of sampling threads is associated with each processor in the plurality of processors and wherein one sampling thread in the plurality of sampling threads obtains call stack information for the identified thread.

Abstract: The disclosed embodiments present a system, method, and computer program product for certifying a timestamp generated by a data processing system. In some embodiments, the method includes receiving a request to certify a timestamp generated by a trusted data processing system, analyzing historical data related to a system time of the data processing system, and certifying the timestamp in response to determining that the historical data indicates a trustworthy system time of the data processing system when the timestamp was generated.

Abstract: A method and system for tracing profiling information using per thread metric variables with reused kernel threads is disclosed. In one embodiment kernel thread level metrics are stored by the operating system kernel. A profiler request metric information for the operating system kernel in response to an event. After the kernel thread level metrics are read by the operating system for a profiler, their values are reset to zero by the operating system kernel. The profiler then applies the metric values to base metric values to appropriate Java threads that are stored in nodes in a tree structure base on the type of event and whether or not the kernel thread has been reused. In another embodiment non-zero values of thread level metrics are entered on a liked list. In response to a request from a profiler, the operating system kernel reads each kernel thread's entry in the linked list and zeros each entry.

Abstract: A computer implemented method, apparatus, and computer usable program code for managing access requests for access to a disk drive. A placement of a set of disk heads tracked and an expected time to process already queued access requests by the disk drive are tracked. In response to receiving the request to access the disk drive at a device driver, a determination is made as to whether the request can be completed within a specified amount of time associated with the request without sending the access request to the disk drive. The request is placed, by the device driver, in a queue for execution if a determination is made that the access request can be completed within the specified amount of time.

Abstract: A method, apparatus, and computer instructions for determining computer flows autonomically using hardware assisted thread stack and cataloged symbolic data. When a new thread is spawned during execution of a computer program, new thread work area is allocated by the operating system in memory for storage of call stack information for the new thread. Hardware registers are set with values corresponding to the new thread work area. Upon context switch, values of the registers are saved in a context save area for future restoration. When call stack data is post-processed, the operating system or a device driver copies call stack data from the thread work areas to a consolidated buffer and each thread is mapped to a process. Symbolic data may be obtained based on the process identifier and address of the method/routine that was called/returned in the thread. Corresponding program flow is determined using retrieved symbolic data and call stack data.

Abstract: A system and method for Java™ call stack sampling combined with native sampling is presented. A kernel-mode device driver records and stores sampled context information that includes a program counter, a thread identifier, and a process identifier. The sampling thread receives a notification from the kernel-mode device driver, and proceeds to collect call stack information from a Java™ Virtual Machine. In turn, the sampling thread retrieves the sampled context information and harvests symbols corresponding to a loaded module. Once symbols are harvested, the sampling thread combines returned call stack nodes with native function leaf nodes into a unified output tree that provides the relationship between the two different node types. In one embodiment, the sampling thread may generate native function leaf nodes and the unified output tree in a post-processing manner.

Abstract: A method, apparatus, and computer instructions in a processor for selectively performing operations on data. An operation to be performed on data is identified to form an identified operation. A determination is made as to whether metadata identifying a state of the data is associated with the data. A determination is made as to whether the identified operation can be performed on the data based on the state of the data, in response to the metadata being associated with the data. The operation is performed on the data if the state of the data allows for the operation to be performed. The processor selectively performs the operations based on the state of the data.

Abstract: A method, apparatus, and computer instructions for qualifying events by types of interrupt when interrupt occurs in the processor of a data processing system. A programmable performance monitoring unit (PMU) is used to program hardware counters that collect events associated with a type of interrupt, including nested interrupts. The performance monitoring unit may also count events that occur while servicing interrupt requests based upon the state of interrupt processing. Events that are known to the performance monitoring unit such as instruction retired, TLB misses, may be counted at the same time using a number of performance monitoring counters in the performance monitoring unit.