Patents by Inventor Frank F. Fang

Frank F. Fang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5401980
    Abstract: A junction is formed by the establishment of first and second adjacent conductivity regions having a transition therebetween from wide (2D) to narrow (1D) with respect to the electron wavelength at the Fermi level. The electrons in the wide region can be propagated at any of a continuum of energies in two dimensions while, in the narrow region, allowable energies become quantized, forming a potential barrier similar to a junction in a tunnel diode. The junction formed in this manner exhibits a Coulomb blockade effect and can be made to operate alternatively as an extremely small capacitance and a conductance to sequentially transfer single electrons, thus forming a Coulomb blockade gate. The Coulomb blockade gate can be used in an oscillator or in digital counting and memory applications.
    Type: Grant
    Filed: September 16, 1993
    Date of Patent: March 28, 1995
    Assignee: International Business Machines Corporation
    Inventors: Frank F. Fang, Richard A. Webb
  • Patent number: 5099299
    Abstract: A modulation doped base heterojunction bipolar transistor wherein the base is a modulation doped heterojunction formed of a layer of p wide gap semiconductor material and a layer of I narrow gap semiconductor material. The collector/base is formed with n+ narrow gap semiconductor material adjacent to the I region of the base. The emitter is n+ wide gap semiconductor material adjacent to the p wide gap layer of the base. The doping concentration and width of the p region of the base is such that all holes are depleted in that region, and a p type inversion layer is formed in the I narrow gap material at its interface with the p wide gap material. This structure provides a modulation doped base heterojunction bipolar transistor which exhibits low base resistance, enhanced performance at low temperatures, a built-in drift field, a reduced emitter injection barrier, no minority carrier storage effects in the base region, and a built-in hot electron effect.
    Type: Grant
    Filed: June 15, 1990
    Date of Patent: March 24, 1992
    Assignee: International Business Machines Corporation
    Inventor: Frank F. Fang
  • Patent number: 4972246
    Abstract: A homojunction bipolar transistor having a superlattice base region comprising alternate layers of extrinsic and intrinsic layers, with extrinsic layers being of the opposite conductivity of the emitter and collector layers of the transistor. The alternate extrinsic and intrinsic layers have substantially different doping levels providing abrupt transitions in the valence and conduction bands between layers. The abrupt transitions result in the energy band gap in the base region being effectively reduced with respect to the band gap in the emitter region. In one embodiment, the effective narrow band gap base transistor is implemented by converting a portion of the upper layers of the superlattice to a homogeneous region by heavily doping the portion to form the emitter of the transistor.
    Type: Grant
    Filed: March 22, 1988
    Date of Patent: November 20, 1990
    Assignee: International Business Machines Corp.
    Inventors: Marc H. Brodsky, Frank F. Fang, Bernard S. Meyerson
  • Patent number: 4939563
    Abstract: Apparatus for a bipolar active semiconductor magnetic field sensor that has a higher sensitivity than semiconductor field sensors presently existing in the art. Specifically, the inventive sensor utilizes a semiconductor structure containing a single emitter layer, a single base layer that is overlaid over the emitter layer and two separate oppositely situated collectors located above the base layer. A bias lateral majority carrier flow is established, in preferably and respectively both the base and emitter layers (electrons in the emitter, holes in the base), that flows in opposite directions in these layers and is oriented normal (transverse) both to the direction of transistor current and to the direction of a magnetic field that is to be detected. When the magnetic field is applied to the sensor, this field imparts a Lorentz force to these carriers which causes these majority carriers to deflect in the same direction in both the emitter and base layers, respectively.
    Type: Grant
    Filed: August 18, 1989
    Date of Patent: July 3, 1990
    Assignee: IBM Corporation
    Inventors: Frank F. Fang, Denny D. Tang
  • Patent number: 4937640
    Abstract: A field effect transistor having operating characteristics based on the control and modulation of the punch through phenomenon. The channel region between the source and the drain regions is appropriately doped such that the source and drain depletion regions overlap when no potential is applied between source and drain. The overlapped region in the absence of a gate field has a potential barrier. A gate voltage modulates the barrier to below the kT/q parameter. The source-to-drain fields also modulate the barrier.
    Type: Grant
    Filed: February 19, 1986
    Date of Patent: June 26, 1990
    Assignee: International Business Machines Corporation
    Inventors: Frank F. Fang, George A. Sai-Halasz
  • Patent number: 4757361
    Abstract: A thin film transistor technology where a gate member on a substrate surface is in electric field influenceable proximity to active semiconductor devices in the direction normal to the substrate surface and the ohmic electrodes of the active device are parallel with the substrate surface. The gate is formed on the substrate and conformal coatings of insulator and semiconductor are provided over it. A metal is deposited from the direction normal to the surface that is thicker in the horizontal dimension than the vertical so as to be susceptible to an erosion operation such as a dip etch which separates the metal into self-aligned contact areas on each side of a semiconductor device channel without additional masking. Self-alignment of the source, drain and gate can be achieved by insulator additions above and under the gate fabricated without additional masking.
    Type: Grant
    Filed: July 23, 1986
    Date of Patent: July 12, 1988
    Assignee: International Business Machines Corporation
    Inventors: Marc H. Brodsky, Frank F. Fang
  • Patent number: 4649638
    Abstract: A construction process employs an insulating abutment which serves as a guide in the formation of a shortlength electrode in the fabrication of a semiconductor device. The process is particularly useful in construction of extremely short channel asymmetric lightly doped drain (LDD) silicon FET's in which case a bird beak is formed on the surface of a silicon wafer. The bird beak is composed of silicon dioxide produced by oxidation of the silicon substrate with the aid of an oxidation resistant covering of silicon nitride, the edge of which defines the location of the abutment. Reactive ion etching is employed to remove excess silicon dioxide leaving a vertical wall at one side of the abutment. Thereafter, the silicon nitride layer is stripped off leaving a slating roof to the abutment. A dope polysilicon layer is deposited conformally on the surface of the substrate and on the abutment to a depth equal to the desired length of the electrode.
    Type: Grant
    Filed: April 17, 1985
    Date of Patent: March 17, 1987
    Assignee: International Business Machines Corp.
    Inventors: Frank F. Fang, Bertrand M. Grossman
  • Patent number: 4568959
    Abstract: A semiconductor structure is provided with progressively changing band gap in a plurality of stages each at an abrupt interface with an asymmetry in the band gap widths such that the major difference in energy gap discontinuity is in the band favoring a particular type of carrier. The transition regions between the progressive material sections are smaller than the carrier mean free path so as to provide kinetic energy for efficient carrier multiplication with reduced noise as the carriers traverse through the device.
    Type: Grant
    Filed: June 2, 1983
    Date of Patent: February 4, 1986
    Assignee: International Business Machines Corporation
    Inventors: Leroy L. Chang, Frank F. Fang
  • Patent number: 4532698
    Abstract: The combined use of an angularly deposited mask with a subsequent angular conductivity conversion operation extending partially under the mask permits both shorter dimensions and the ability to accommodate the straggle location change when subsequent processing steps occur. The mask is deposited at a low angle with respect to a planar surface, a subsequent conductivity conversion, such as ion implantation, extends under the mask, the mask is removed and a smaller gate is positioned in its location, the gate being smaller than the distance from the source to the point where the conversion extended under the mask, providing thereby an ultra-short gate FET.
    Type: Grant
    Filed: June 22, 1984
    Date of Patent: August 6, 1985
    Assignee: International Business Machines Corporation
    Inventors: Frank F. Fang, Bertrand M. Grossman, Wei Hwang
  • Patent number: 4447746
    Abstract: A digital photodetector circuit having a photosensing stage connected to a depletion mode field effect transistor forming an inverter stage, increased sensitivity is achieved by then coupling the output of the photo inverter to a second photo inverter whose photosensitive element serves as the active load of an enhancement mode field effect transistor in the inverter stage. The circuit is readily fabricated in integrated structures. The circuit performance may be adjusted for responsiveness to light sensitivity and to provide selectable electrical output signal level and impedance matching including bistable performance.
    Type: Grant
    Filed: December 31, 1981
    Date of Patent: May 8, 1984
    Assignee: International Business Machines Corporation
    Inventors: Frank F. Fang, James C. McGroddy
  • Patent number: 4326208
    Abstract: A semiconductor inversion layer transistor which is compatible with semiconductor fabrication technology, and an integrated circuit which incorporates a plurality of such transistors. In one embodiment of the transistor, a P type indium arsenide base and a P type gallium antimonide emitter are used while the collector can be made of either P type gallium antimonide or N type indium arsenide. By the nature of the band alignment at the interface, the indium arsenide base has its Fermi level pinned in the conduction ban at the base-emitter junction and an assymetrically conducting charge barrier which is formed at this junction is preferential to injection of carriers flowing from the emitter to the base rather than vice versa. When the base-emitter junction is forward biased the electrons at the junction are projected across the base with minimal hole injection from base to emitter, thus providing a high gain transistor having excellent high frequency characteristics.
    Type: Grant
    Filed: March 26, 1980
    Date of Patent: April 20, 1982
    Assignee: International Business Machines Corporation
    Inventors: Frank F. Fang, George A. Sai-Halasz
  • Patent number: 4302764
    Abstract: A MOSFET which is capable of being placed in two states, one of which is quasi-stable and a memory cell which includes such a device is disclosed. The device basically consists of a pair of diffusions of one conductivity type disposed in a substrate of opposite conductivity type. The channel region between the diffusions is ion implanted or diffused with a dopant which forms a channel of the same conductivity type as the diffusions. A gate electrode is spaced from the channel region by a thin oxide and the gate and substrate are biased so that two states of the device are possible. One is a stable, equilibrium or conducting state wherein an opposite conductivity type inversion layer is formed at the surface of the now buried channel. Another state is a quasi-stable, nonequilibrium, nonconductive state wherein the channel region between the diffusions is depleted of mobile charge carriers.
    Type: Grant
    Filed: June 29, 1979
    Date of Patent: November 24, 1981
    Assignee: International Business Machines Corporation
    Inventors: Frank F. Fang, Hwa N. Yu
  • Patent number: 4274104
    Abstract: The overall performance of integrated circuit systems is enhanced by the use of optical drivers and receivers to send and receive information between the devices on the chip and between individual chips in a system. A single substrate of gallium arsenide employs both the high carrier mobility properties and the electrooptical signal conversion properties on a single substrate to provide both high performance electrical properties and high density and high performance communication properties.
    Type: Grant
    Filed: May 21, 1979
    Date of Patent: June 16, 1981
    Assignee: International Business Machines Corporation
    Inventors: Frank F. Fang, Roland Y. Hung
  • Patent number: 4211586
    Abstract: Multicolor light emitting diode arrays can be made using a binary semiconductor substrate on which is grown a graded epitaxial region of an AB.sub.1-x C.sub.x semiconductor. Diodes emitting various light colors can selectively be formed in different regions of the gradient by etching away a portion of the graded region. Arrays of colored light emitting diodes can be made by the techniques of diffusion and selective etching of the graded material.
    Type: Grant
    Filed: November 6, 1978
    Date of Patent: July 8, 1980
    Assignee: International Business Machines Corporation
    Inventors: Frank F. Fang, Kwang K. Shih
  • Patent number: 4148045
    Abstract: Multicolor light emitting diode arrays can be made using a binary semiconductor substrate on which is grown a graded epitaxial region of an AB.sub.1-x C.sub.x semiconductor. Diodes emitting various light colors can selectively be formed in different regions of the gradient by etching away a portion of the graded region. Arrays of colored light emitting diodes can be made by the techniques of diffusion and selective etching of the graded material.
    Type: Grant
    Filed: September 21, 1977
    Date of Patent: April 3, 1979
    Assignee: International Business Machines Corporation
    Inventors: Frank F. Fang, Kwang K. Shih
  • Patent number: 3983419
    Abstract: An analog waveform transducing circuit is disclosed which includes a pair of superconductive circuits connected in parallel between a pair of terminals. One of these circuits includes a Josephson tunnelling device and the other includes inductance (which may be distributed) which is greater than the inductance of the Josephson device. An analog signal is applied to one of said terminals. Means are provided for switching said Josephson device between normal and superconductive states to thereby trap one or more flux quanta. An output means is coupled to one of the two circuits.In one embodiment the means for switching the Josephson device responds to the analog signal level only, that is the control current is fixed (or zero). In this embodiment a number of pulses may be produced which can be related to the signal level, so that the circuit is an analog to digital converter.
    Type: Grant
    Filed: December 31, 1974
    Date of Patent: September 28, 1976
    Assignee: International Business Machines - IBM
    Inventor: Frank F. Fang