Patents by Inventor Frank Hintermaier

Frank Hintermaier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7122856
    Abstract: The capacitor has a capacitor dielectric formed, in particular, as a high-?-dielectrical or ferroelectrical layer. A barrier layer is formed of a compound of a transition element with phosphorus, sulfur or arsenic. The barrier layer is underneath the capacitor dielectric. The barrier layer is oxygen-impermeable and thus prevents the oxidation of deep structures during high-temperature processes, in particular during the production of the capacitor dielectric.
    Type: Grant
    Filed: September 25, 1998
    Date of Patent: October 17, 2006
    Assignee: Infineon Technologies AG
    Inventor: Frank Hintermaier
  • Patent number: 6790676
    Abstract: A method for producing a ferroelectric layer includes preparing a substrate, applying a layer of material, which will be subsequently converted into the ferroelectric layer, and changing the material into the ferroelectric layer by applying an outer electrical field aligned with the direction desired in the ferroelectric material and heat treating the material. By providing a first noble metal electrode on the surface before applying the material that is to become the ferroelectric layer and then subsequently forming a second noble metal electrode on the ferroelectric layer, a ferroelectric storage capacitor can be formed. If the substrate is provided with memory cells, which include at least one transistor for each cell and the above-mentioned ferroelectric storage capacitors, a ferroelectric memory arrangement can be produced.
    Type: Grant
    Filed: December 5, 2002
    Date of Patent: September 14, 2004
    Assignee: Infineon Technologies AG
    Inventors: Hans Cerva, Walter Hartner, Frank Hintermaier, Joachim Hoepfner, Guenther Schindler, Volker Weinrich, Franz Winterauer
  • Patent number: 6730562
    Abstract: A method for structuring ferroelectric layers on semiconductor substrates retains or regenerates the adherence and breakdown voltage resistance of the ferroelectric layer, which is especially significant for producing storage capacitors in large-scale integrated FeRAM and DRAM memory components. The addition of H2O or O2 results principally in the recovery of the electrostatic breakdown strength of the ferroelectric layer, which is of importance in particular when the ferroelectric serves as a dielectric of a storage capacitor and has to withstand electric fields of 5-10×106 V/m without a significant leakage current.
    Type: Grant
    Filed: February 11, 2003
    Date of Patent: May 4, 2004
    Assignee: Infineon Technologies AG
    Inventors: Manfred Engelhardt, Walter Hartner, Frank Hintermaier, Günther Schindler, Volker Weinrich
  • Patent number: 6669857
    Abstract: A process is described for etching oxide films containing at least one bismuth-containing oxide, in particular a ferroelectric bismuth-containing mixed oxide. A substrate onto which at least one oxide film containing at least one bismuth-containing oxide has been applied is provided. An etching solution containing from 2 to 20% by weight of a fluoride ion donor, from 15 to 60% by weight of nitric acid and from 20 to 83% by weight of water is brought into contact with the substrate so that the etching solution can react with the oxide film. The etching solution is removed from the substrate. The etching solution is also used in a process for structuring bismuth-containing oxide films.
    Type: Grant
    Filed: February 11, 2002
    Date of Patent: December 30, 2003
    Assignee: Infineon Technologies AG
    Inventor: Frank Hintermaier
  • Publication number: 20030157734
    Abstract: A method for structuring ferroelectric layers on semiconductor substrates retains or regenerates the adherence and breakdown voltage resistance of the ferroelectric layer, which is especially significant for producing storage capacitors in large-scale integrated FeRAM and DRAM memory components. The addition of H2O or O2 results principally in the recovery of the electrostatic breakdown strength of the ferroelectric layer, which is of importance in particular when the ferroelectric serves as a dielectric of a storage capacitor and has to withstand electric fields of 5-10×106 V/m without a significant leakage current.
    Type: Application
    Filed: February 11, 2003
    Publication date: August 21, 2003
    Inventors: Manfred Engelhardt, Walter Hartner, Frank Hintermaier, Gunther Schindler, Volker Weinrich
  • Patent number: 6605505
    Abstract: A process for producing an integrated semiconductor memory configuration, in particular one suited to the use of ferroelectric materials as storage dielectrics, in which a conductive connection between one electrode of a storage capacitor and a selection transistor is not produced until after the storage dielectric has been deposited; and a semiconductor memory configuration produced using the production process.
    Type: Grant
    Filed: June 15, 2001
    Date of Patent: August 12, 2003
    Assignee: Siemens Aktiengesellschaft
    Inventors: Frank Hintermaier, Carlos Mazure-Espejo
  • Publication number: 20030138977
    Abstract: A method for producing a ferroelectric layer includes preparing a substrate, applying a layer of material, which will be subsequently converted into the ferroelectric layer, and changing the material into the ferroelectric layer by applying an outer electrical field aligned with the direction desired in the ferroelectric material and heat treating the material. By providing a first noble metal electrode on the surface before applying the material that is to become the ferroelectric layer and then subsequently forming a second noble metal electrode on the ferroelectric layer, a ferroelectric storage capacitor can be formed. If the substrate is provided with memory cells, which include at least one transistor for each cell and the above-mentioned ferroelectric storage capacitors, a ferroelectric memory arrangement can be produced.
    Type: Application
    Filed: December 5, 2002
    Publication date: July 24, 2003
    Inventors: Hans Cerva, Walter Hartner, Frank Hintermaier, Joachim Hoepfner, Guenther Schindler, Volker Weinrich, Franz Winterauer
  • Patent number: 6586348
    Abstract: After an SBT layer is precipitated onto a substrate, the SBT layer is structured as a still amorphous layer. Only subsequently is it subjected to a crystallization process. Layers produced in this manner have a relatively high degree of dielectric strength and have no stoichiometric deviations on the etched edges.
    Type: Grant
    Filed: May 7, 2001
    Date of Patent: July 1, 2003
    Assignee: Infineon Technologies AG
    Inventors: Walter Hartner, Günther Schindler, Frank Hintermaier, Volker Weinrich
  • Patent number: 6527848
    Abstract: A new complex of an element of transition group IV or V is provided for forming an improved precursor combination for use in chemical vapor deposition (CVD). This complex dispenses with an alkoxide ligand having an &agr; proton, so that hydrolysis of the complex no longer liberates a reducing agent.
    Type: Grant
    Filed: May 29, 2001
    Date of Patent: March 4, 2003
    Assignee: Infineon Technologies AG
    Inventors: Frank Hintermaier, Ralf Metzger, Christoph Werner
  • Patent number: 6495415
    Abstract: A method for fabricating a patterned layer from a layer material. The method includes steps of: providing a substrate with at least one target region and at least one migration region; applying a layer material; adding a material to the layer material; and performing a heat treatment such that the layer material migrates from the migration region to the target region and a layer which is self-aligned and self-patterned with respect to the target region is formed. The method has the advantage that the layer material, which can often only be etched with difficulty, does not have to be patterned directly. The desired structure of the layer is predetermined by preliminarily structuring the substrate into a target region and a migration region, and is produced by the migration of the layer material as a result of the heat treatment.
    Type: Grant
    Filed: December 26, 2001
    Date of Patent: December 17, 2002
    Assignee: Infineon Technologies AG
    Inventors: Walter Hartner, Igor Kasko, Volker Weinrich, Frank Hintermaier, Günther Schindler, Hermann Wendt
  • Publication number: 20020130105
    Abstract: A process is described for etching oxide films containing at least one bismuth-containing oxide, in particular a ferroelectric bismuth-containing mixed oxide. A substrate onto which at least one oxide film containing at least one bismuth-containing oxide has been applied is provided. An etching solution containing from 2 to 20% by weight of a fluoride ion donor, from 15 to 60% by weight of nitric acid and from 20 to 83% by weight of water is brought into contact with the substrate so that the etching solution can react with the oxide film. The etching solution is removed from the substrate. The etching solution is also used in a process for structuring bismuth-containing oxide films.
    Type: Application
    Filed: February 11, 2002
    Publication date: September 19, 2002
    Inventor: Frank Hintermaier
  • Patent number: 6438019
    Abstract: The invention relates to a ferroelectric RAM configuration, including a number of storage cells, each of which has a selection transistor and a capacitor device with a ferroelectric dielectric. The capacitor device includes at least two capacitors whose coercive voltages are different from each other.
    Type: Grant
    Filed: January 8, 2001
    Date of Patent: August 20, 2002
    Assignee: Infineon Technologies AG
    Inventors: Walter Hartner, Günther Schindler, Frank Hintermaier
  • Publication number: 20020090450
    Abstract: A method for fabricating a precious-metal electrode for a storage capacitor includes providing a substrate, applying a catalytically inactive insulation and a catalytically active connection region to the substrate. The catalytically active connection region can be a precious metal material such as a precious metal or an oxide of a precious metal. The catalytically active connection region and the catalytically inactive insulation region are produced, for example, by patterning the connection region or by planarizing the connection region and the insulation region. The next step is depositing selectively the precious metal material on the catalytically active connection region by passing an organometallic compound of a precious metal to the substrate at a temperature from 0° to 120° C.
    Type: Application
    Filed: December 26, 2001
    Publication date: July 11, 2002
    Inventors: Walter Hartner, Frank Hintermaier, Gunther Schindler
  • Publication number: 20020086511
    Abstract: A method for fabricating a patterned layer from a layer material. The method includes steps of: providing a substrate with at least one target region and at least one migration region; applying a layer material; adding a material to the layer material; and performing a heat treatment such that the layer material migrates from the migration region to the target region and a layer which is self-aligned and self-patterned with respect to the target region is formed. The method has the advantage that the layer material, which can often only be etched with difficulty, does not have to be patterned directly. The desired structure of the layer is predetermined by preliminarily structuring the substrate into a target region and a migration region, and is produced by the migration of the layer material as a result of the heat treatment.
    Type: Application
    Filed: December 26, 2001
    Publication date: July 4, 2002
    Inventors: Walter Hartner, Igor Kasko, Volker Weinrich, Frank Hintermaier, Gunther Schindler, Hermann Wendt
  • Publication number: 20020000175
    Abstract: A new complex of an element of transition group IV or V is provided for forming an improved precursor combination for use in chemical vapor deposition (CVD). This complex dispenses with an alkoxide ligand having an &agr; proton, so that hydrolysis of the complex no longer liberates a reducing agent.
    Type: Application
    Filed: May 29, 2001
    Publication date: January 3, 2002
    Inventors: Frank Hintermaier, Ralf Metzger, Christoph Werner
  • Publication number: 20010055890
    Abstract: After an SBT layer is precipitated onto a substrate, the SBT layer is structured as a still amorphous layer. Only subsequently is it subjected to a crystallization process. Layers produced in this manner have a relatively high degree of dielectric strength and have no stoichiometric deviations on the etched edges.
    Type: Application
    Filed: May 7, 2001
    Publication date: December 27, 2001
    Inventors: Walter Hartner, Gunther Schindler, Frank Hintermaier, Volker Weinrich
  • Patent number: 6316802
    Abstract: The integrated semiconductor memory configuration has a semiconductor body in which selection transistors and storage capacitors are integrated. The storage capacitors have a dielectric layer configured between two electrodes. At least the upper electrode is constructed in a layered manner with a platinum layer, that is seated on the dielectric layer, and a thicker, base metal layer lying above the platinum layer.
    Type: Grant
    Filed: March 30, 1999
    Date of Patent: November 13, 2001
    Assignee: Infineon Technologies AG
    Inventors: Günther Schindler, Walter Hartner, Frank Hintermaier, Carlos Mazure-Espejo, Rainer Bruchhaus, Wolfgang Hönlein, Manfred Engelhardt
  • Publication number: 20010039106
    Abstract: Process for producing an integrated semiconductor memory configuration, in particular one suited to the use of ferroelectric materials as storage dielectrics, in which a conductive connection between one electrode of a storage capacitor and a selection transistor is not produced until after the storage dielectric has been deposited; and a semiconductor memory configuration produced using the production process.
    Type: Application
    Filed: June 15, 2001
    Publication date: November 8, 2001
    Applicant: Siemens Aktiengesellschaft
    Inventors: Frank Hintermaier, Carlos Mazure-Espejo
  • Patent number: 6297526
    Abstract: Process for producing an integrated semiconductor memory configuration, in particular one suited to the use of ferroelectric materials as storage dielectrics, in which a conductive connection between one electrode of a storage capacitor and a selection transistor is not produced until after the storage dielectric has been deposited; and a semiconductor memory configuration produced using the production process.
    Type: Grant
    Filed: March 30, 1999
    Date of Patent: October 2, 2001
    Assignee: Siemens Aktiengesellschaft
    Inventors: Frank Hintermaier, Carlos Mazure-Espejo
  • Patent number: 6258153
    Abstract: The device enables the deposition of substances from a gas phase. The device has a deposition chamber with at least one inner wall that is maintained at a deposition temperature for the deposition of the substances. A delivery end of a feed line extends to or into the deposition chamber. The substances to be deposited in the deposition chamber are delivered in gas form via the feed line. The feed has a transport temperature above the deposition temperature. This transport temperature is selected such that premature deposition of the substances inside the feed is prevented. A thermal insulation is formed between the feed and the inner wall of the deposition chamber. Any cooling of the feed toward its delivery end down to the deposition temperature is thereby prevented.
    Type: Grant
    Filed: June 18, 1999
    Date of Patent: July 10, 2001
    Assignee: Siemens Aktiengesellschaft
    Inventor: Frank Hintermaier