Abstract: A tester-verifier apparatus operates to select a single one of a plurality of system clocks to verify that the clock width falls between accepted parameters. Secondarily, the apparatus selects representative clock signals for comparison with a reference clock to verify that the skew falls within accepted parameters. Additionally the apparatus can measure the exact time value of any pulse width or skew relationship to within 500 picoseconds (10.sup.-12). Any selected system clock signal is split into two channels, one of which has a controlled delay time programmed by a microprocessor to develop minimum and maximum pulse parameters against which the selected clock signal is logically compared to see if the parameters are satisfied.