Patents by Inventor Frank O. Uher

Frank O. Uher has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120113556
    Abstract: An apparatus is described for burn-in and/or functional testing of microelectronic circuits of unsingulated wafers. A large number of power, ground, and signal connections can be made to a large number of contacts on a wafer. The apparatus has a cartridge that allows for fanning-in of electric paths. A distribution board has a plurality of interfaces that are strategically positioned to provide a dense configuration. The interfaces are connected through flexible attachments to an array of first connector modules. Each one of the first connector modules can be independently connected to a respective one of a plurality of second connector modules, thereby reducing stresses on a frame of the apparatus. Further features include for example a piston that allows for tight control of forces exerted by terminals onto contacts of a wafer.
    Type: Application
    Filed: January 18, 2012
    Publication date: May 10, 2012
    Applicant: Aehr Test Systems
    Inventors: Donald P. Richmond, II, Kenneth W. Deboe, Frank O. Uher, Jovan Jovanovic, Scott E. Lindsey, Thomas T. Maenner, Patrick M. Shepherd, Jeffrey L. Tyson, Mark C. Carbone, Paul W. Burke, Doan D. Cao, James F. Tomic, Long V. Vu
  • Patent number: 8118618
    Abstract: An apparatus is described for burn-in and/or functional testing of microelectronic circuits of unsingulated wafers. A large number of power, ground, and signal connections can be made to a large number of contacts on a wafer. The apparatus has a cartridge that allows for fanning-in of electric paths. A distribution board has a plurality of interfaces that are strategically positioned to provide a dense configuration. The interfaces are connected through flexible attachments to an array of first connector modules. Each one of the first connector modules can be independently connected to a respective one of a plurality of second connector modules, thereby reducing stresses on a frame of the apparatus. Further features include for example a piston that allows for tight control of forces exerted by terminals onto contacts of a wafer.
    Type: Grant
    Filed: May 3, 2010
    Date of Patent: February 21, 2012
    Assignee: Aehr Test Systems
    Inventors: Donald P. Richmond, II, Kenneth W. Deboe, Frank O. Uher, Jovan Jovanovic, Scott E. Lindsey, Thomas T. Maenner, Patrick M. Shepherd, Jeffrey L. Tyson, Mark C. Carbone, Paul W. Burke, Doan D. Cao, James F. Tomic, Long V. Vu
  • Publication number: 20100213957
    Abstract: An apparatus is described for burn-in and/or functional testing of microelectronic circuits of unsingulated wafers. A large number of power, ground, and signal connections can be made to a large number of contacts on a wafer. The apparatus has a cartridge that allows for fanning-in of electric paths. A distribution board has a plurality of interfaces that are strategically positioned to provide a dense configuration. The interfaces are connected through flexible attachments to an array of first connector modules. Each one of the first connector modules can be independently connected to a respective one of a plurality of second connector modules, thereby reducing stresses on a frame of the apparatus. Further features include for example a piston that allows for tight control of forces exerted by terminals onto contacts of a wafer.
    Type: Application
    Filed: May 3, 2010
    Publication date: August 26, 2010
    Applicant: Aehr Test Systems
    Inventors: Donald P. Richmond, II, Kenneth W. Deboe, Frank O. Uher, Jovan Jovanovic, Scott E. Lindsey, Thomas T. Maenner, Patrick M. Shepherd, Jeffrey L. Tyson, Mark C. Carbone, Paul W. Burke, Doan D. Cao, James F. Tomic, Long V. Vu
  • Patent number: 7762822
    Abstract: An apparatus is described for burn-in and/or functional testing of microelectronic circuits of unsingulated wafers. A large number of power, ground, and signal connections can be made to a large number of contacts on a wafer. The apparatus has a cartridge that allows for fanning-in of electric paths. A distribution board has a plurality of interfaces that are strategically positioned to provide a dense configuration. The interfaces are connected through flexible attachments to an array of first connector modules. Each one of the first connector modules can be independently connected to a respective one of a plurality of second connector modules, thereby reducing stresses on a frame of the apparatus. Further features include for example a piston that allows for tight control of forces exerted by terminals onto contacts of a wafer.
    Type: Grant
    Filed: April 27, 2006
    Date of Patent: July 27, 2010
    Assignee: Aehr Test Systems
    Inventors: Donald P. Richmond, II, Kenneth W. Deboe, Frank O. Uher, Jovan Jovanovic, Scott E. Lindsey, Thomas T. Maenner, Long V. Vu
  • Patent number: 7301358
    Abstract: A method of assembling a test contactor is described. The method includes aligning an interposer and an electrical contactor wherein resilient interconnection elements of the interposer are resiliently deformed into a deformed state to make electrical contact with corresponding electrical terminals on the electrical contactor; and securing the interposer and the electrical contactor together to lock the resilient interconnection elements in said deformed state.
    Type: Grant
    Filed: October 22, 2004
    Date of Patent: November 27, 2007
    Assignee: Aehr Test Systems
    Inventors: Jovan Jovanovic, Frank O. Uher, Donald P. Richmond, II
  • Patent number: 6853209
    Abstract: The invention provides a contactor assembly.
    Type: Grant
    Filed: July 16, 2002
    Date of Patent: February 8, 2005
    Assignee: Aehr Test Systems
    Inventors: Jovan Jovanovic, Frank O. Uher, Donald P. Richmond, II
  • Patent number: 5447570
    Abstract: Apparatus including a support and purge gas supply prevents edge and backside coating on a wafer in manufacture of integrated circuits. Various enclosure elements and methods are disclosed for containing and directing purge gas, and a CVD system is provided incorporating the elements of the invention.
    Type: Grant
    Filed: June 23, 1992
    Date of Patent: September 5, 1995
    Assignee: Genus, Inc.
    Inventors: Johannes J. Schmitz, Frederick J. Scholz, Norman L. Turner, Raymond L. Chow, Frank O. Uher, Sien G. Kang, Steven C. Selbrede
  • Patent number: 5387289
    Abstract: A system for depositing a film on a substrate in a CVD process has a second-source injection sub-system for injecting a control gas. The deposition rate of the material deposited in the CVD process is a function of the concentration of the control gas at the point that material is deposited. The second source injection sub-system provides a concentration gradient of the control gas relative to the substrate surface coated, and alters the thickness uniformity of the film. By controlling the gradient one may control the thickness uniformity profile. In another embodiment, the invention applies to dry etching with reactive gas, and the etching rate is controlled by second source provision of a control gas.
    Type: Grant
    Filed: September 22, 1992
    Date of Patent: February 7, 1995
    Assignee: Genus, Inc.
    Inventors: Johannes J. Schmitz, Raymond L. Chow, Sien G. Kang, Edward J. Rode, Frank O. Uher