Patents by Inventor Frank Pfirsch

Frank Pfirsch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140291809
    Abstract: The semiconductor substrate includes a high-ohmic semiconductor material with a conduction band edge and a valence band edge, separated by a bandgap, wherein the semiconductor material includes acceptor or donor impurity atoms or crystal defects, whose energy levels are located at least 120 meV from the conduction band edge, as well as from the valence band edge in the bandgap; and wherein the concentration of the impurity atoms or crystal defects is larger than 1×1012 cm?3.
    Type: Application
    Filed: June 11, 2014
    Publication date: October 2, 2014
    Inventors: Hans-Joachim Schulze, Frank Pfirsch, Hans-Joerg Timme
  • Publication number: 20140284702
    Abstract: A field plate trench transistor having a semiconductor body. In one embodiment the semiconductor has a trench structure and an electrode structure embedded in the trench structure. The electrode structure being electrically insulated from the semiconductor body by an insulation structure and having a gate electrode structure and a field electrode structure. The field plate trench transistor has a voltage divider configured such that the field electrode structure is set to a potential lying between source and drain potentials.
    Type: Application
    Filed: June 5, 2014
    Publication date: September 25, 2014
    Inventors: Franz Hirler, Walter Rieger, Thorsten Meyer, Wolfgang Klein, Frank Pfirsch
  • Patent number: 8809971
    Abstract: A semiconductor component comprising a semiconductor body, a channel zone in the semiconductor body, a channel control electrode adjacent to the channel zone, and a dielectric layer between the channel zone and the channel control electrode, wherein the dielectric layer has a relative dielectric constant ?r with a negative temperature coefficient.
    Type: Grant
    Filed: August 23, 2010
    Date of Patent: August 19, 2014
    Assignee: Infineon Technologies Austria AG
    Inventors: Hans-Joachim Schulze, Frank Pfirsch
  • Publication number: 20140213022
    Abstract: A method of manufacturing a reduced free-charge carrier lifetime semiconductor structure includes forming a plurality of transistor gate structures in trenches arranged in a semiconductor substrate, forming a body region between adjacent ones of the transistor gate structures and forming an end-of-range irradiation region between adjacent ones of the transistor gate structures, the end-of-range irradiation region having a plurality of vacancies.
    Type: Application
    Filed: March 28, 2014
    Publication date: July 31, 2014
    Inventors: Holger Ruething, Hans-Joachim Schulze, Frank Hille, Frank Pfirsch
  • Publication number: 20140203349
    Abstract: A high-voltage-resistant semiconductor component (1) has vertically conductive semiconductor areas (17) and a trench structure (5). These vertically conductive semiconductor areas are formed from semiconductor body areas (10) of a first conductivity type and are surrounded by a trench structure (5) on the upper face (6) of the semiconductor component. For this purpose the trench structure has a base (7) and a wall area (8) and is filled with a material (9) with a relatively high dielectric constant (?r).
    Type: Application
    Filed: December 23, 2013
    Publication date: July 24, 2014
    Applicant: Infineon Technologies AG
    Inventor: Frank Pfirsch
  • Patent number: 8779462
    Abstract: The semiconductor substrate includes a high-ohmic semiconductor material with a conduction band edge and a valence band edge, separated by a bandgap, wherein the semiconductor material includes acceptor or donor impurity atoms or crystal defects, whose energy levels are located at least 120 meV from the conduction band edge, as well as from the valence band edge in the bandgap; and wherein the concentration of the impurity atoms or crystal defects is larger than 1×1012 cm?3.
    Type: Grant
    Filed: May 19, 2008
    Date of Patent: July 15, 2014
    Assignee: Infineon Technologies AG
    Inventors: Hans-Joachim Schulze, Hans-Joerg Timme, Frank Pfirsch
  • Patent number: 8759905
    Abstract: A field plate trench transistor having a semiconductor body. In one embodiment the semiconductor has a trench structure and an electrode structure embedded in the trench structure. The electrode structure being electrically insulated from the semiconductor body by an insulation structure and having a gate electrode structure and a field electrode structure. The field plate trench transistor has a voltage divider configured such that the field electrode structure is set to a potential lying between source and drain potentials.
    Type: Grant
    Filed: December 17, 2012
    Date of Patent: June 24, 2014
    Assignee: Infineon Technologies Austria AG
    Inventors: Franz Hirler, Walter Rieger, Thorsten Meyer, Wolfgang Klein, Frank Pfirsch
  • Patent number: 8674727
    Abstract: A circuit arrangement includes a transistor component with a gate terminal, a control terminal, and a load path between a source and a drain terminal. A drive circuit is connected to the control terminal and configured to determine a load condition of the transistor component, to provide a drive potential to the control terminal, and to adjust the drive potential dependent on the load condition.
    Type: Grant
    Filed: August 31, 2010
    Date of Patent: March 18, 2014
    Assignee: Infineon Technologies Austria AG
    Inventors: Anton Mauder, Franz Hirler, Frank Pfirsch
  • Patent number: 8643085
    Abstract: A high-voltage-resistant semiconductor component (1) has vertically conductive semiconductor areas (17) and a trench structure (5). These vertically conductive semiconductor areas are formed from semiconductor body areas (10) of a first conductivity type and are surrounded by a trench structure (5) on the upper face (6) of the semiconductor component. For this purpose the trench structure has a base (7) and a wall area (8) and is filled with a material (9) with a relatively high dielectric constant (?r). The base area (7) of the trench structure (5) is provided with a heavily doped semiconductor material (11) of the same conductivity type as the lightly doped semiconductor body areas (17), and/or having a metallically conductive material (12).
    Type: Grant
    Filed: September 23, 2005
    Date of Patent: February 4, 2014
    Assignee: Infineon Technologies AG
    Inventor: Frank Pfirsch
  • Publication number: 20140027814
    Abstract: A semiconductor device is provided which includes a semiconductor body having a base region and a main horizontal surface, and a first electrode arranged on the main horizontal surface. The semiconductor body further includes a plurality of vertical trenches having gate electrodes in a vertical cross-section. A body region forms a first pn-junction with the base region and extends between two of the vertical trenches. A source region is in ohmic contact with the first electrode and arranged between the two vertical trenches. An anti-latch-up region is arranged between the two vertical trenches and in ohmic contact with the first electrode. The anti-latch-up region has a maximum doping concentration which is higher than a maximum doping concentration of the body region. An anode region forms a rectifying pn-junction with the base region only and adjoins a third one of the vertical trenches, and has ohmic contact with the first electrode.
    Type: Application
    Filed: January 23, 2013
    Publication date: January 30, 2014
    Inventor: Frank Pfirsch
  • Patent number: 8637328
    Abstract: An integrated circuit and method for making an integrated circuit including doping a semiconductor body is disclosed. One embodiment provides defect-correlated donors and/or acceptors. The defects required for this are produced by electron irradiation of the semiconductor body. Form defect-correlated donors and/or acceptors with elements or element compounds are introduced into the semiconductor body.
    Type: Grant
    Filed: August 1, 2012
    Date of Patent: January 28, 2014
    Assignee: Infineon Technologies Austria AG
    Inventors: Frank Pfirsch, Hans-Joachim Schulze, Franz-Josef Niedernostheide
  • Publication number: 20140015007
    Abstract: A semiconductor device includes a cell region having at least one device cell, wherein the at least one device cell includes a first device region of a first conductivity type. The semiconductor device further includes a drift region of a second conductivity type adjoining the first device region of the at least one device cell, a doped region of the first conductivity type adjoining the drift region, and charge carrier lifetime reduction means configured to reduce a charge carrier lifetime in the doped region of the first conductivity type.
    Type: Application
    Filed: June 21, 2013
    Publication date: January 16, 2014
    Inventors: Dorothea Werber, Frank Pfirsch, Hans-Joachim Schulze, Carsten Schaeffer, Volodymyr Komarnitskyy, Anton Mauder, Holger Schulze, Gerhard Miller
  • Publication number: 20140001528
    Abstract: A semiconductor component with a drift region and a drift control region. One embodiment includes a semiconductor body having a drift region of a first conduction type in the semiconductor body. A drift control region composed of a semiconductor material, which is arranged, at least in sections, is adjacent to the drift region in the semiconductor body. An accumulation dielectric is arranged between the drift region and the drift control region.
    Type: Application
    Filed: June 11, 2013
    Publication date: January 2, 2014
    Inventors: Frank Pfirsch, Anton Mauder, Armin Willmeroth, Hans-Joachim Schulze, Stefan Sedlmaier, Markus Zundel, Franz Hirler, Arunjai Mittal
  • Publication number: 20130341674
    Abstract: A semiconductor device includes a first emitter region of a first conductivity type, a second emitter region of a second conductivity type complementary to the first type, a drift region of the second conductivity type, and a first electrode. The first and second emitter regions are arranged between the drift region and first electrode and each connected to the first electrode. A device cell of a cell region includes a body region of the first conductivity type adjoining the drift region, a source region of the second conductivity type adjoining the body region, and a gate electrode adjacent the body region and dielectrically insulated from the body region by a gate dielectric. A second electrode is electrically connected to the source and body regions. A parasitic region of the first conductivity type is disposed outside the cell region and includes at least one section with charge carrier lifetime reduction means.
    Type: Application
    Filed: June 21, 2012
    Publication date: December 26, 2013
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Dorothea Werber, Frank Pfirsch, Hans-Joachim Schulze, Carsten Schaeffer, Volodymyr Komarnitskyy, Anton Mauder
  • Publication number: 20130341673
    Abstract: A semiconductor device includes a first emitter region of a first conductivity type, a second emitter region of a second conductivity type complementary to the first conductivity type, and a drift region of the second conductivity type arranged in a semiconductor body. The first and second emitter regions are arranged between the drift region and a first electrode and are each connected to the first electrode. A device cell of a cell region includes a body region of the first conductivity type adjoining the drift region, a source region of the second conductivity type adjoining the body region, and a gate electrode adjacent the body region and dielectrically insulated from the body region by a gate dielectric. A second electrode is electrically connected to the source region and the body region. A floating parasitic region of the first conductivity type is disposed outside the cell region.
    Type: Application
    Filed: June 21, 2012
    Publication date: December 26, 2013
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Frank Pfirsch, Dorothea Werber, Anton Mauder, Carsten Schaeffer
  • Patent number: 8592903
    Abstract: A bipolar semiconductor device and manufacturing method. One embodiment provides a diode structure including a structured emitter coupled to a first metallization is provided. The structured emitter includes a first weakly doped semiconductor region of a first conductivity type which forms a pn-load junction with a weakly doped second semiconductor region of the diode structure. The structured emitter includes at least a highly doped first semiconductor island of the first conductivity type which at least partially surrounds a highly doped second semiconductor island of the second conductivity type.
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: November 26, 2013
    Assignee: Infineon Technologies Austria AG
    Inventors: Hans-Joachim Schulze, Frank Pfirsch
  • Publication number: 20130299835
    Abstract: A field effect semiconductor device includes a semiconductor body having a main horizontal surface and a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type arranged between the first semiconductor region and the main horizontal surface, an insulating layer arranged on the main horizontal surface, and a first metallization arranged on the insulating layer. The first and second semiconductor regions form a pn-junction. The semiconductor body further has a deep trench extending from the main horizontal surface vertically below the pn-junction and including a conductive region insulated from the first semiconductor region and the second semiconductor region, and a narrow trench including a polycrystalline semiconductor region extending from the first metallization, through the insulating layer and at least to the conductive region.
    Type: Application
    Filed: March 25, 2013
    Publication date: November 14, 2013
    Inventors: Franz Hirler, Anton Mauder, Frank Pfirsch, Hans-Joachim Schulze
  • Patent number: 8564098
    Abstract: Disclosed is a method for controlling the recombination rate in the base region of a bipolar semiconductor component, and a bipolar semiconductor component.
    Type: Grant
    Filed: March 5, 2010
    Date of Patent: October 22, 2013
    Assignee: Infineon Technologies Austria AG
    Inventors: Anton Mauder, Franz Hirler, Frank Pfirsch, Hans-Joachim Schulze
  • Publication number: 20130270632
    Abstract: A semiconductor device includes a first trench and a second trench extending into a semiconductor body from a surface. A body region of a first conductivity type adjoins a first sidewall of the first trench and a first sidewall of the second trench, the body region including a channel portion adjoining to a source structure and being configured to be controlled in its conductivity by a gate structure. The channel portion is formed at the first sidewall of the second trench and is not formed at the first sidewall of the first trench. An electrically floating semiconductor zone of the first conductivity type adjoins the first trench and has a bottom side located deeper within the semiconductor body than the bottom side of the body region.
    Type: Application
    Filed: June 13, 2013
    Publication date: October 17, 2013
    Inventors: Frank Pfirsch, Maria Cotorogea, Franz Hirler, Franz-Josef Niedernostheide, Thomas Raker, Hans-Joachim Schulze, Hans Peter Felsl
  • Publication number: 20130264607
    Abstract: A semiconductor includes a drift zone of a first conductivity type arranged between a first side and a second side of a semiconductor body. The semiconductor device further includes a first region of the first conductivity type and a second region of a second conductivity type subsequently arranged along a first direction parallel to the second side. The semiconductor device further includes an electrode at the second side adjoining the first and second regions. The semiconductor device further includes a third region of the second conductivity type arranged between the drift zone and the first region. The third region is spaced apart from the second region and from the second side.
    Type: Application
    Filed: April 6, 2012
    Publication date: October 10, 2013
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Dorothea Werber, Anton Mauder, Frank Pfirsch, Hans-Joachim Schulze, Franz Hirler, Alexander Philippou