Abstract: A semiconductor integrated display is disclosed herein in which a matrix of conductive display electrodes is formed over a corresponding matrix of switching devices which are integrated in a single crystal semiconductor chip such that the display electrodes are connected to their respective switching devices through respective conductive paths. The display electrodes are divided into a plurality of subsets each of which is formed in respective layers, so that the display electrodes of an upper subset overlap the edges of the display electrodes of the lower subset. The display electrode layers are separated by intermediate layers of electrically insulating material. The conductive paths from each higher layer subset passes through gaps between electrodes of any lower subset and through the insulating layers to connect their respective electrodes to the corresponding switching devices.

Abstract: An electrochromic matrix display of the kind in which the display electrodes are supported on a substrate above a corresponding matrix of transistor switches employs constant current writing and potentiostatic erasure. The transistors are switchable by signals applied on respective gate lines to pass electric current on the respective drive lines to their display electrodes. Gate and drive selection means define the active gate and drive lines During erasure, the potentiostatic erase voltage is applied to both ends of the selected drive lines simultaneously to speed up the current limited asynchronous erase operation. Optionally, the display may be driven alternately from opposite ends of the drive lines during a line-by-line writing operation.