Patents by Inventor Frank Vahid

Frank Vahid has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230177102
    Abstract: A method includes receiving first data from a cloud-based word processing system. The method further includes extracting, from the first data, one or more key elements. The method further includes dividing the first data into components based on the one or more key elements. The method further includes rendering a first document based on the components of the first data and the one or more key elements.
    Type: Application
    Filed: October 3, 2022
    Publication date: June 8, 2023
    Inventor: Frank Vahid
  • Publication number: 20160225274
    Abstract: Systems and methods are disclosed for providing adaptive learning activities, such as exercises, quizzes, tests, examination, learning assessment tools, and other learning activities. A first aspect involves the system providing a progressive learning activity, where a question associated with a first step is presented to a user. If the user responds to the question incorrectly, the system presents the user another question associated with the first step. If the user responds correctly, the system presents the user another question associated with a second step. The questions get progressively more difficult as the user completes steps. A second aspect involves the system presenting a list of topics for review by the user based on responding to a single question or multiple questions. A third aspect involves the system generating a quiz based on one or more parameters selected by a user or based on a learning progress indicator of the user.
    Type: Application
    Filed: January 29, 2016
    Publication date: August 4, 2016
    Inventors: Frank Vahid, Alex Edgcomb, Sarah Strawn
  • Publication number: 20150206444
    Abstract: An apparatus for creating or modifying browser-renderable teaching objects for use in creating a browser-renderable textbook data object. The apparatus includes a database, a network interface for receiving a source file containing codes for creating or modifying the browser-renderable teaching objects by way of a network, and a processor configured to create or modify the teaching objects based on the codes, and store the teaching objects in the database. A first code instructs the processor to create at least one browser-renderable section object for the textbook data object, the first code including a first attribute configured to instruct the processor to configure the at least one section object such that, when rendered by a browser module, a specified section title is provided at a beginning of the at least one section object; and (2) set of codes configured to instruct the processor to create or modify the teaching objects within the at least one section object.
    Type: Application
    Filed: January 22, 2015
    Publication date: July 23, 2015
    Inventors: Frank Vahid, Alex Edgcomb, Sarah Strawn
  • Publication number: 20150206447
    Abstract: An apparatus for creating or modifying browser-renderable teaching objects for use in creating a browser-renderable textbook data object. The apparatus includes a database, a network interface for receiving a source file containing codes for creating or modifying the browser-renderable teaching objects by way of a network, and a processor configured to create or modify the teaching objects based on the codes, and store the teaching objects in the database. A first code instructs the processor to create at least one browser-renderable section object for the textbook data object, the first code including a first attribute configured to instruct the processor to configure the at least one section object such that, when rendered by a browser module, a specified section title is provided at a beginning of the at least one section object; and (2) set of codes configured to instruct the processor to create or modify the teaching objects within the at least one section object.
    Type: Application
    Filed: January 22, 2015
    Publication date: July 23, 2015
    Inventors: Frank Vahid, Smita Bakshi, Joshua Yuen, Daniel de Haas, Sarah Strawn, Alex Edgcomb, Roman Lysecky, Ryan Renno, Scott Sirowy, Susan Lysecky
  • Patent number: 7555658
    Abstract: Stand-alone modules or blocks for use in creating low-power sensor-based monitor/control systems. Each module performs a pre-defined function, and when included in a monitor/control network operates as a node on the network and automatically communicates with one or more connected nodes using a uni-directional packet-based protocol. One class of such predefined nodes communicates Boolean values, for example, with input sensor nodes detecting the presence or absence of environmental phenomena (e.g., motion, light, sound, water, button presses, etc.), intermediate nodes transforming those Boolean values using combinational or sequential logic, and output nodes converting the resulting Boolean values to environmental phenomena (e.g., beeping, light, electric relay activation, etc.) or to data for further processing by a computer. Another class of nodes communicates integer or number values.
    Type: Grant
    Filed: May 10, 2005
    Date of Patent: June 30, 2009
    Assignee: Regents of the University of California
    Inventors: Frank Vahid, Susan Lysecky
  • Patent number: 7356672
    Abstract: A warp processor includes a microprocessor, profiler, dynamic partitioning module, and warp configurable logic architecture. The warp processor initially executes a binary for an application entirely on the microprocessor, the profiler monitors the execution of the binary to detect its critical code regions, and the dynamic partitioning module partitions the binary into critical and non-critical code regions, re-implements the critical code regions in the configurable logic, and then transforms the binary so that it accesses the configurable logic rather than execute the critical code regions.
    Type: Grant
    Filed: May 28, 2004
    Date of Patent: April 8, 2008
    Assignee: The Regents of the University of California
    Inventors: Frank Vahid, Roman Lev Lysecky, Gregory Michael Stitt
  • Publication number: 20060095893
    Abstract: Stand-alone modules or blocks for use in creating low-power sensor-based monitor/control systems. Each module performs a pre-defined function, and when included in a monitor/control network operates as a node on the network and automatically communicates with one or more connected nodes using a uni-directional packet-based protocol. One class of such predefined nodes communicates Boolean values, for example, with input sensor nodes detecting the presence or absence of environmental phenomena (e.g., motion, light, sound, water, button presses, etc.), intermediate nodes transforming those Boolean values using combinational or sequential logic, and output nodes converting the resulting Boolean values to environmental phenomena (e.g., beeping, light, electric relay activation, etc.) or to data for further processing by a computer. Another class of nodes communicates integer or number values.
    Type: Application
    Filed: May 10, 2005
    Publication date: May 4, 2006
    Applicant: The Regents of the University of California a California Corporation
    Inventors: Frank Vahid, Susan Lysecky
  • Publication number: 20050278714
    Abstract: A warp processor includes a microprocessor, profiler, dynamic partitioning module, and warp configurable logic architecture. The warp processor initially executes a binary for an application entirely on the microprocessor, the profiler monitors the execution of the binary to detect its critical code regions, and the dynamic partitioning module partitions the binary into critical and non-critical code regions, re-implements the critical code regions in the configurable logic, and then transforms the binary so that it accesses the configurable logic rather than execute the critical code regions.
    Type: Application
    Filed: May 28, 2004
    Publication date: December 15, 2005
    Inventors: Frank Vahid, Roman Lysecky, Gregory Stitt
  • Patent number: 6865526
    Abstract: A method for reducing power consumption by using power estimation data obtained from at the gate-level for a core's representative input stimuli data (instructions), and propagating the power estimation data to a higher (object-oriented) system-level model, which is parameterizable and executable. Depending on the kind of cores, various parameterizable look-up table techniques are used to facilitate self-analyzing core models. As a result, the method is faster than gate-level power estimation techniques and power-related system-level design decisions.
    Type: Grant
    Filed: January 24, 2000
    Date of Patent: March 8, 2005
    Assignees: University of California-Riverside, NEC Corporation
    Inventors: Jörg Henkel, Tony Givargis, Frank Vahid