Abstract: In accordance with a first aspect of the present disclosure, a storage device is provided, comprising: a capacitor configured to be charged; a charge circuit configured to charge said capacitor; a pass device coupled between the charge circuit and the capacitor; a control circuit configured to control said pass device; a photosensitive diode coupled between the control circuit and the pass device, such that an input voltage provided by the control circuit to the pass device is reduced if the storage device is exposed to light. In accordance with a second aspect of the present disclosure, a corresponding method of producing a storage device is conceived.

Abstract: In accordance with a first aspect of the present disclosure, a storage device is provided, comprising: a capacitor configured to be charged; a charge circuit configured to charge said capacitor; a pass device coupled between the charge circuit and the capacitor; a control circuit configured to control said pass device; a photosensitive diode coupled between the control circuit and the pass device, such that an input voltage provided by the control circuit to the pass device is reduced if the storage device is exposed to light. In accordance with a second aspect of the present disclosure, a corresponding method of producing a storage device is conceived.

Abstract: It is described a method for providing an electronic key within an integrated circuit (100) including both a volatile memory (102) and a non-volatile memory (104). The described comprises starting up the integrated circuit (100), reading the logical state of predetermined data storage cells (102a) assigned to the volatile memory (102), which data storage cells (102a) are characterized that with a plurality of start up procedures they respectively adopt the same logical state, and generating an electronic key by using the logical state of the predetermined data storage cells (102a). Preferably, the predetermined data storage cells (102a) are randomly distributed within the volatile memory (102). It is further described an integrated circuit (100) for providing an electronic key.

Abstract: A tamper-resistant semiconductor device (5;20;30;40;50;60) which includes a plurality of electronic circuits formed on a circuitry side (6) of a substrate (7) having an opposite side which is a backside (8) of the semiconductor device, and comprises at least one light-emitting device (9a-f;21) and at least one light-sensing device (10a-f;22a-b) provided on the circuitry side (6) of the semiconductor device. The light-emitting device (9a-f;21) is arranged to emit light, including a wavelength range for which the substrate (7) is transparent, into the substrate towards the backside (8), and the light-sensing device (10a-f;22a-b) is arranged to sense at least a fraction of the emitted light following passage through the substrate (7) and reflection at the backside (8), and configured to output a signal indicative of a reflecting state of the backside, thereby enabling detection of an attempt to tamper with the backside (8) of the semiconductor device (5;20;30;40;50;60).

Abstract: A tamper-resistant semiconductor device (5;20;30;40;50;60) which includes a plurality of electronic circuits formed on a circuitry side (6) of a substrate (7) having an opposite side which is a backside (8) of the semiconductor device, and comprises at least one light-emitting device (9a-f;21) and at least one light-sensing device (10a-f;22a-b) provided on the circuitry side (6) of the semiconductor device. The light-emitting device (9a-f;21) is arranged to emit light, including a wavelength range for which the substrate (7) is transparent, into the substrate towards the backside (8), and the light-sensing device (10a-f;22a-b) is arranged to sense at least a fraction of the emitted light following passage through the substrate (7) and reflection at the backside (8), and configured to output a signal indicative of a reflecting state of the backside, thereby enabling detection of an attempt to tamper with the backside (8) of the semiconductor device (5;20;30;40;50;60).

Abstract: It is described a method for providing an electronic key within an integrated circuit (100) including both a volatile memory (102) and a non-volatile memory (104). The described comprises starting up the integrated circuit (100), reading the logical state of predetermined data storage cells (102a) assigned to the volatile memory (102), which data storage cells (102a) are characterized that with a plurality of start up procedures they respectively adopt the same logical state, and generating an electronic key by using the logical state of the predetermined data storage cells (102a). Preferably, the predetermined data storage cells (102a) are randomly distributed within the volatile memory (102). It is further described an integrated circuit (100) for providing an electronic key.

Abstract: A method for analyzing an integrated circuit (IC) comprising a plurality of semiconductor devices is disclosed. The method comprises the steps of forming a diffraction lens (100) comprising a plurality of concentric diffraction zones (110) in a first area of a further surface opposite to the first surface of the substrate (10), and a further step of optically accessing a subset (30) of the plurality of semiconductor devices (20) through the diffraction lens (100). Due to the fact that a diffraction lens (100) can be implemented at submicron sizes, the lens (100) can be formed more cheaply than a refraction lens, which usually is several microns deep. Moreover, the lens (100) can be easily polished off the substrate (10), which facilitates repeated relocation of the lens (100) on the substrate (10), thus improving the chance of optically detecting a fault inside the IC.