Abstract: A test apparatus and method for fully testing the functional aspects of a computer system at the system level through one or more of its I/O ports. A test system is connected to an externally available I/O port of the computer under test for accessing its system ROM and a jumper is installed on the computer under test to disable its system ROM. The jumper also bypasses the PCMCIA controller, if necessary, to provide the test system direct access to the I/O port and thus the system ROM. The computer under test is booted from diagnostic test code stored in memory of the test system, where the diagnostic test code has complete control and performs a series of tests on the computer under test. Other I/O ports of the computer under test, including its serial ports, parallel port, keyboard and mouse ports, video port and a docking port may also be connected to the test system, if desired.

Abstract: An improved test probe for use with a bed of nails type test fixture is disclosed. The test probe comprises a probe body having a test head at one end for contacting test points on a DUT placed in a test fixture and an annular ring disposed around the circumference thereof proximate the center of the probe. A nonconductive tubular sheath is disposed over the test head and affixed at one end to the test probe by the annular ring. The other end of the sheath extends beyond the test head such that the test head is recessed within the sheath a distance defined by component lead length and PCB thickness fault tolerances and acceptable float. In this manner, the test probe enables the detection of PCB faults caused by missing or improperly or incorrectly inserted plated through-hole mounted components.