Abstract: A calculating unit for performing an arithmetic operation with at least two operands, the at least two operands being encrypted, includes an arithmetic-logic unit with a first input for the first encrypted operand, a second input for the second encrypted operand, a third input for an encryption parameter and an output for an encrypted result of the operation, the arithmetic-logic unit being formed so as to operate on the first input, the second input and the third input by means of arithmetic sub-operations, while considering the type of encryption of the operands, such that at the output, an encrypted result is obtained which equals a value that would be obtained if the first operand was subjected to the arithmetic operation in a non-encrypted state and if the second operand would be subjected to the arithmetic operation in a non-encrypted state, and a result obtained was subsequently encrypted, no decryption of the operands being performed in the arithmetic-logic unit.

Abstract: A circuit arrangement comprising a logic circuit to be tested and a test circuit is provided. The logic circuit is designed to provide output data from input data, said output data being generated from the input data by logic-circuit-internal combinations, such that the output data are in a predetermined relationship with the input data. The logic circuit is designed to detect whether the relationship is fulfilled and to provide an error signal if the relationship is not fulfilled. The test circuit is designed to alter logic-circuit-internal combinations. The test circuit is designed to detect the error signal, and is furthermore designed to output an alarm signal if the error signal is not detected upon alteration of the logic-circuit-internal combinations.

Abstract: A method for the protected transmission of data words involves provision of a first data word (X1), transformation of the first data word (X1) into a sequence comprising at least one second data word (X2) by a first transformation rule (T1), transformation of at least one of the second data words (X2) into a third data word (X3) by a second transformation rule (T2), and checking whether a prescribed relationship exists between the third data word (X3) and a comparison data word (VX).

Abstract: Method for protected transmission of data words includes providing a first data word, transforming the first data word into a sequence including at least one second data word using a first transformation rule, transforming at least one of the second data words into a third data word using a second transformation rule, and checking whether a prescribed relationship exists between the third data word and a comparison data word.

Abstract: An error detection device for an address decoder converting an input address to an associated output address out of a plurality of valid output addresses using a 1-out-of-n decoder, the error detection device including a regenerator for generating a regenerated address on the basis of the output address from the 1-out-of-n decoder, and a comparer for receiving the input address and the regenerated address and to output a signal, on the basis of a comparison of the input address and the regenerated address, which indicates an error in the conversion of the input address to the output address if the input address and the regenerated address do not match, and which indicates an error-free conversion of the input address to the output address if the input address equals the regenerated address.

Abstract: An apparatus for providing a number with random distribution for use in a circuit including a signal processor processing encrypted data. The apparatus includes a unit formed to provide the number from at least a portion of the encrypted data processed by the signal processor.

Abstract: An error detection device for a command decoder is described, the command decoder reading out an associated sequence of control signal words from a command memory based on an input word, wherein the sequence of control signal words has at least one control signal word, having: a controller designed to provide the input word at a first time and the input word at a second time for reading out the command memory, wherein the second time is delayed with respect to the first time, to effect a readout of the sequence of control signal words at a first time and a readout of the sequence of control signal words at a second time; and a comparator designed to receive and compare the associated sequences of control signal words read out at the first and second times, and to output a signal indicating an error if the associated sequences of control signal words read out at the first and second times are different.

Abstract: Circuit having a bus, a first receiver circuit part coupled to the bus for processing a signal on the bus, a second receiver circuit part coupled to the bus for processing a signal on the bus, a transmitter circuit part coupled to the bus for outputting a signal on the bus, and a unit for preventing processing a signal on the bus by the first receiver circuit part in response to a control signal.

Abstract: A compiling device for generating a second program sequence from a first program sequence comprises a recognizer for recognizing a first subarea and a second subarea of the first program sequence, and a selector for selecting instructions from a set of instructions of the second program sequence formed to select only instructions of a first security category for mapping a functionality of the first subarea and to select instructions of the second security category for mapping a functionality of the second subarea. Additionally, the compiling device comprises a generator for generating the second program sequence from the instructions selected.

Abstract: A data processing apparatus comprises a data processing module, which can be operated in a first operating mode with a normal power consumption and a second operating mode, wherein a power consumption of the data processing module in the second operating mode is smaller than the first power consumption or equal to 0. The data processing apparatus further comprises means for signaling a possibility that the data processing module can be placed into the second operating mode, means for providing a time-varying control signal, means for placing the data processing module from one data operating mode to the other, wherein means for placing is formed to place the data processing module into the other operating mode, when means for signaling signals the possibility and the control signal fulfills a predetermined condition.

Abstract: A shift device for shifting a first place of a data word, which consists of a plurality of places, to a second place so as to obtain a shifted data word, wherein the first place is encrypted using a first encryption parameter and wherein the second place is encrypted using a second encryption parameter, includes a unit for shifting the first place of the data word to the second place of the data word, a unit for re-encrypting the first place from an encryption using the first encryption parameter into an encryption using the second encryption parameter, and a control for controlling the unit for shifting and the unit for re-encryption so that the first place is first shifted to the second place and is then re-encrypted, or that the first place is first re-encrypted and is then shifted to the second place. This ensures that data encrypted either with the first encryption parameter or with the second encryption parameter are always shifted, thus making it harder for attackers to eavesdrop on clear text data.

Abstract: Circuit arrangement for secure data processing for program data with a protected data record. An internal memory provides a protected data record having instruction words and a first check word associated with the instruction words. An arithmetic and logic unit has an input coupled to the internal memory and outputs the first check word from the applied protected data record. A checking apparatus has an input coupled between the internal memory and the arithmetic and logic unit, and allocates a second check word to the instruction words in the protected data record. A comparison apparatus has respective inputs coupled to the checking apparatus and the arithmetic and logic unit, and compares the first check word with the second check word, and outputs an alarm signal when the first check word does not match the second check word.

Abstract: A controller has a receiver for receiving an instruction, the instruction being an executable instruction or a wildcard instruction. A decoder is formed to output a control signal corresponding to the executable instruction responsive to an executable instruction, and to output a switch signal responsive to a received wildcard instruction. Additionally, the controller has a provider for providing a predetermined substitute control signal outputting the predetermined substitute control signal depending on the switch signal.

Abstract: A controller having a receiver for receiving an instruction, a comparator for comparing the received instruction to a predetermined wildcard instruction, the comparator providing a switch signal to a provider for providing a predetermined substitution instruction responsive to the predetermined wildcard instruction. Depending on the switch signal, the provider outputs the received instruction or the other instruction.

Abstract: Circuit having a bus, a first receiver circuit part coupled to the bus for processing a signal on the bus, a second receiver circuit part coupled to the bus for processing a signal on the bus, a transmitter circuit part coupled to the bus for output-ting a signal on the bus, and a unit for preventing processing a signal on the bus by the first receiver circuit part in response to a control signal.

Abstract: A shift device for shifting a first place of a data word, which consists of a plurality of places, to a second place so as to obtain a shifted data word, wherein the first place is encrypted using a first encryption parameter and wherein the second place is encrypted using a second encryption parameter, includes a unit for shifting the first place of the data word to the second place of the data word, a unit for re-encrypting the first place from an encryption using the first encryption parameter into an encryption using the second encryption pa- rameter, and a control for controlling the unit for shifting and the unit for re-encryption so that the first place is first shifted to the second place and is then re-encrypted, or that the first place is first re-encrypted and is then shifted to the second place. This ensures that data encrypted either with the first encryption parameter or with the second encryption parameter are always shifted, thus making it harder for attackers to eavesdrop on clear text data.

Abstract: A calculating unit for performing an arithmetic operation with at least two operands, the at least two operands being encrypted, includes an arithmetic-logic unit with a first input for the first encrypted operand, a second input for the second encrypted operand, a third input for an encryption parameter and an output for an encrypted result of the operation, the arithmetic-logic unit being formed so as to operate on the first input, the second input and the third input by means of arithmetic sub-operations, while considering the type of encryption of the operands, such that at the output, an encrypted result is obtained which equals a value that would be obtained if the first operand was subjected to the arithmetic operation in a non-encrypted state and if the second operand would be subjected to the arithmetic operation in a non-encrypted state, and a result obtained was subsequently encrypted, no decryption of the operands being performed in the arithmetic-logic unit.

Abstract: A data processing apparatus comprises a data processing module, which can be operated in a first operating mode with a normal power consumption and a second operating mode, wherein a power consumption of the data processing module in the second operating mode is smaller than the first power consumption or equal to 0. The data processing apparatus further comprises means for signaling a possibility that the data processing module can be placed into the second operating mode. Further, means for providing a time-varying control signal is provided, wherein means feeds means for placing the data processing module from one data operating mode to the other, wherein means for placing is formed to place the data processing module into the other operating mode, when means for signaling signals the possibility and the control signal fulfils a predetermined condition.

Abstract: For temporary connection of two containers (1, 3) such as vials, bottles, etc. . . . , with guaranteed tightness thanks to a cylindrical screwing closing and connection plastic sleeve (4) having a plastic perforable membrane (7) located between its upper portion (6) and lower portion (5) including an elastomer sealing ring (13) fixed around a cylindrical plastic skirt (12) located in the inner lower portion (5), and an elastomer sealing plug (18) fixed by the collar (17) and the annular rib (16) in the inner upper portion (6), a cylindrical plastic skirt (12) coming in contact with the inner neck (10) of the glass or plastic vial (1), the whole assuring complete tightness of the system when stored and when used for the reconstitution of the product (2) contained in a glass or plastic vial (1) with a corresponding solvent (23) contained in a plastic solvent bottle (3).