Patents by Inventor Fred W. Adamic, Jr.

Fred W. Adamic, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190204172
    Abstract: A square-shaped pressure sensor in which the four sides of the sensor have “stepped edge” features. The “stepped edge” features are formed using deep reactive ion etch (DRIE) techniques. The sensor comprises of a first side, a second side, a third side, and a fourth side, and a diaphragm positioned between the four sides. The first side has an outside face comprised of a first ledge and a second ledge; the second side has an outside face comprised of a third ledge and a fourth ledge, the third side has an outside face comprised of a fifth to ledge and a sixth ledge, and the fourth side has an outside face comprised of a seventh ledge and an eighth ledge. The eight ledges are the “stepped edge” features of the sensor.
    Type: Application
    Filed: January 2, 2018
    Publication date: July 4, 2019
    Inventors: Dennis Dauenhauer, Fred W. Adamic, JR.
  • Patent number: 6124179
    Abstract: A method of semiconductor fabrication includes the steps of forming a dielectric layer on a first surface of a semiconductor wafer having a plurality of laterally distributed semiconductor devices selectively interconnected on the first surface and bonding a support substrate to the first surface of the semiconductor wafer on the dielectric layer to form a composite structure. A portion of the semiconductor wafer from a second surface which is opposite the first surface is removed and the second surface of the semiconductor wafer is processed. Processing of the second surface optionally includes the formation of isolation trenches electrically isolating the laterally distributed semiconductor devices.
    Type: Grant
    Filed: January 30, 1998
    Date of Patent: September 26, 2000
    Inventor: Fred W. Adamic, Jr.
  • Patent number: 6084284
    Abstract: A method of semiconductor fabrication includes the steps of forming a dielectric layer on a first surface of a semiconductor wafer having a plurality of laterally distributed semiconductor devices selectively interconnected on the first surface and bonding a support substrate to the first surface of the semiconductor wafer on the dielectric layer to form a composite structure. A portion of the semiconductor wafer from a second surface which is opposite the first surface is removed and the second surface of the semiconductor wafer is processed. Processing of the second surface optionally includes the formation of isolation trenches electrically isolating the laterally distributed semiconductor devices.
    Type: Grant
    Filed: October 26, 1999
    Date of Patent: July 4, 2000
    Inventor: Fred W. Adamic, Jr.
  • Patent number: 5841197
    Abstract: A method of semiconductor fabrication includes the steps of forming a dielectric layer on a first surface of a semiconductor wafer having a plurality of laterally distributed semiconductor devices selectively interconnected on the first surface and bonding a support substrate to the first surface of the semiconductor wafer on the dielectric layer to form a composite structure. A portion of the semiconductor wafer from a second surface which is opposite the first surface is removed and the second surface of the semiconductor wafer is processed. Processing of the second surface optionally includes the formation of isolation trenches electrically isolating the laterally distributed semiconductor devices.
    Type: Grant
    Filed: September 5, 1996
    Date of Patent: November 24, 1998
    Inventor: Fred W. Adamic, Jr.
  • Patent number: 4945762
    Abstract: A device and method for trimming diffused or implanted resistors incorporated within a silicon sensor. Current pulses are applied to cause the migration of aluminum contacts in silicon, resulting in controllable incremental reductions in resistor value. The resistors are symmetrically positioned within a Wheatstone bridge to correct offset voltage and sensitvity erros that result from manufacturing tolerances.
    Type: Grant
    Filed: January 24, 1989
    Date of Patent: August 7, 1990
    Assignee: SenSym, Inc.
    Inventor: Fred W. Adamic, Jr.