Abstract: An apparatus and system having both PCI Root Port (RP) device and Direct Memory Access (DMA) End Point device functionality is disclosed. The apparatus is for use in an input/output (I/O) system interconnect module (IOSIM) device. A DMA/RP module includes a RP portion and one or more DMA/RP portions. The RP portion has one or more queue pipes and is configured to function as a standard PCIe Root Port device. Each of the DMA/RP portions includes DMA engines and DMA input and output channels, and is configured to behave more like an End Point device. The DMA/RP module also includes one or more PCIe hard core portions, an ICAM (I/O Caching Agent Module), and at least one PCIe service block (PSB). *The hard core portion couples the DMA/RP module and IOSIM device to an I/O device via a PCIe link, and the ICAM transitions data to a host memory device operating system.

Abstract: An apparatus containing a maintenance interface unit is described. In one exemplary implementation, the apparatus includes a multiprocessor system and the maintenance interface unit. The multiprocessor system uses cache coherency for accessing memory. The maintenance interface unit is integrated within the multiprocessor system and is configured to provide a backdoor accessibility to the multiprocessor system on-behalf of a peripheral maintenance system. The maintenance interface unit is also configured to perform operations within the multiprocessor system while maintaining the cache coherency.