Abstract: A GTO having a cathode emitter (7) is specified, which cathode emitter has a low emission efficiency. This cathode emitter (7) provides a clearly increased resistance to the formation of current filaments. As a result, relatively high turn-off current densities can be reliably mastered. In addition, the fraction of the hole current in the total current is more than 10%. This is achieved, for example, by selecting the penetration depth as <1 .mu.m and the edge concentration as <10.sup.19 cm.sup.-3.

Abstract: An insulated-gate bipolar transistor (IGBT) is specified, the collector (7) and source regions (8) of which can be produced by means of a self-aligning method. This provides an IGBT which is distinguished by a homogeneous turn-off current distribution. For this purpose, the width W of the source regions (8) is selected to be so small that holes can flow laterally into the surrounding collector region. In this connection it must be ensured that the voltage drop across the PN junction of the source regions and collector regions remains below the inherent forward voltage at any time. In consequence, the IGBT according to the invention is particularly insensitive to latch-up.

Abstract: To avoid peripheral current-density overshoots in a turn-off power semiconductor device, in particular an MOS-controlled thyristor MCT having a multiplicity of separate MCT cells ((M1, . . . , M3), the unit cells (here: MCT cells (M1, . . . , M3)) are combined in groups to form segments (SE) and are surrounded peripherally by peripheral short-circuit regions (10, 15) which are embedded in the semiconductor substrate (1) from the cathode side and are directly connected to the cathode contact (2). At the same time, the peripheral short-circuit regions (10) are of the same conductivity type as the anode-side emitter layer (8).

Abstract: In an MOS-controlled thyristor MCT comprising a multiplicity of adjacently disposed individual MCT cells (MC) having a cell width and which are electrically connected in parallel, either the MCT cells (MC) themselves or cell clusters (15) comprising a few closest-packed MCT cells (MC) are mutually separated by nonemitting gaps (2) which do not inject charge carriers into the cathode base layer and which have lateral linear dimensions greater than or at least equal to the cell width of the MCT cells (MC). As a result of this separation, the full performance of the individual MCT cell (MC) is achieved even in large-area components containing many cells.

Abstract: In an MOS-controlled power semiconductor device with switch-off facility having a thyristor-like structure, the switch-off capability is improved by inserting emitter ballast resistors between the first main electrode (H1) and the associated emitter region (8). For this purpose, the emitter region (8) is of annular or strip-like construction and encloses a more weakly doped central region (9) which is exclusively contacted by the first main-electrode metallization (2).

Abstract: In a MOS-controlled thyristor MCT, the second base layer (16) is pulled to the cathode-side surface of the semiconductor substrate (1) between the MCT until cells. At this point, a collector zone (20), which is doped oppositely to the second base layer (16) is arranged which is connected to the cathode contact (2) and reaches into the second base layer (16). Together with the second base layer (16) and an additional opposite anode short circuit, the collector zone (20) forms an inverse diode structure (11) which saves an external free-wheeling diode when inductive loads are switched.

Abstract: In the case of a symmetrically constructed TRIAC, which comprises a semiconductor substrate (20) with an internal n-base layer (9), two adjoining p-base layers (7, 11), two n-emitter regions (4, 12) let into the p-base layers (7, 11), two main electrodes (1, 17) arranged on the principal faces (29, 30), and two firing devices, a simplified control is achieved by means of MOS-controlled short circuits (3, 5, 6, 7 or 11, 13, 14, 16) at the n-emitter regions (4 or 12).

Abstract: In an MOS-controlled bipolar power semiconductor component, a recombination layer (10), which is doped with the same polarity as the base layer but more highly, is inserted, starting with the structure of an IGBT, into the base layer between anode (A) and cathode (K), which recombination layer divides the base layer into an upper and lower base layer (7a and 7b, respectively). The resultant structure forms a series circuit of MOSFET (T) and PIN diode (D) which is free of latch-up and provides the possibility of higher blocking voltages.

Abstract: In an IGT (Insulated Gate Transistor), the short-circuiting between the n-type regions (5c) and the p-type regions (4b) of the n-type emitter layer or p-type base layer respectively is produced by a buried conducting layer (12), specifically in the form of a metal silicide layer. Regardless of the spacing between cathode contact (8) and gate (7), the length of the n-type regions (5c) can thereby be reduced to such an extent that latching-up of the component is virtually impossible.

Abstract: In a controllable power semiconductor component having a pnpn layer sequence of p-type emitter layer (9), n-type base layer (8), p-type base layer (7) and n-type emitter layer (5) the critical increased field rise during turn-off is reduced as a result of an intermediate layer (11), which has a higher n-doping than the n-type base layer (8) and which is inserted between the n-type base layer (8) and the p-type base layer (7).

Abstract: In an n-channel MCT (MOS-controlled thyristor), the p-doped channel region and the n.sup.+ -doped drain region are replaced by an n-doped combined channel-drain region (13) in the MOSFET structure of the switchable cathode short-circuits.The resulting MOSFET structure of the depletion type results in latch-up immunity for the component and makes possible a simple optimization of the current level which can be switched off as a maximum.