Patents by Inventor Fu-Tai An

Fu-Tai An has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240114703
    Abstract: A package structure and a formation method are provided. The method includes providing a semiconductor substrate and bonding a first chip structure on the semiconductor substrate through metal-to-metal bonding and dielectric-to-dielectric bonding. The method also includes bonding a second chip structure over the semiconductor substrate through solder-containing bonding structures. The method further includes forming a protective layer surrounding the second chip structure. A portion of the protective layer is between the semiconductor substrate and a bottom of the second chip structure.
    Type: Application
    Filed: February 2, 2023
    Publication date: April 4, 2024
    Inventors: Tsung-Fu TSAI, Szu-Wei LU, Shih-Peng TAI, Chen-Hua YU
  • Patent number: 11927312
    Abstract: The disclosure provides an electronic device, including a circuit board, multiple semiconductor components, a first light reflecting structure, and a second light reflecting structure. The circuit board includes a substrate, and the substrate may have a first surface and at least one side surface. The multiple semiconductor components are disposed on the first surface. The first light reflecting structure is disposed on the first surface. The second light reflecting structure is disposed on the first surface and the at least one side surface.
    Type: Grant
    Filed: April 18, 2022
    Date of Patent: March 12, 2024
    Assignee: Innolux Corporation
    Inventors: Chin-Chia Huang, Chieh-Ying Chen, Jia-Huei Lin, Chin-Tai Hsu, Tzu-Chien Huang, Fu-Sheng Tsai
  • Patent number: 11815571
    Abstract: The present invention provides an electric current sensor comprising a substrate and MR sensing circuit. The substrate has a first surface along a first axis and a second axis. The MR sensing circuit is utilized to detect a magnetic filed about a third axis. The MR sensing circuit is formed onto the first surface and has a plurality of MR sensor pairs. Each MR sensor in each MR sensor pair has a plurality of conductive structures, wherein the conductive structures of one MR sensor are symmetrically arranged. Alternatively, the present invention provides an electric current sensing device using a pair of electric sensors symmetrically arranged at two lateral sides of a conductive wire having an electric current flowing therethrough for eliminating the magnetic field along Z axis generated by external environment.
    Type: Grant
    Filed: May 3, 2022
    Date of Patent: November 14, 2023
    Assignee: VOLTAFIELD TECHNOLOGY CORPORATION
    Inventors: Nai-Chung Fu, Chien-He Hou, Chih-Chao Shih, Fu-Tai Liou
  • Publication number: 20230299779
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for implementing a SAR ADC circuit with improved quantization error. In some implementations, an apparatus includes an analog-to-digital converter (ADC) configured to receive a set of voltage signals and generate digital representations of signals. The ADC comprises a capacitive digital-to-analog converter (CDAC) comprising a capacitive divider circuit, the capacitive divider circuit comprising (i) a first capacitor in parallel with a second capacitor in a first branch, (ii) a plurality of capacitors in a plurality of other respective branches, and (iii) the CDAC configured to receive the set of sampled voltages and adjust each set of the sampled voltages by a first voltage or a second voltage through selection of one or more capacitors of the (i) first capacitor and the second capacitor and (ii) one or more of the plurality of capacitors.
    Type: Application
    Filed: January 13, 2023
    Publication date: September 21, 2023
    Inventors: Shiva Prasad Kotagiri, Fu-Tai An
  • Publication number: 20220416805
    Abstract: Circuitry is disclosed herein that dynamically (temperature-invariant and voltage-invariant) adjusts the Ron of switches in a resistive Nyquist-rate digital to analog converter (DAC) to thereby reduce DAC nonlinearity errors and improve INL results of greater than 16b. Consistent with the present disclosure, the DAC includes an R-2R ladder in which each bit corresponds to a switch. A control circuit is provided for generating signals applied to the gate of the switch to cause the on-resistances of the switch to be a particular value, such that the on-resistance of the switch plus the sum of two resistors, one having the resistance R, and the other having a resistance R? is equivalent to the resistance of the 2R-size resistors or twice the resistance of the R-sized resistors in the ladder.
    Type: Application
    Filed: June 28, 2022
    Publication date: December 29, 2022
    Applicant: Infinera Corporation
    Inventors: Fu-Tai An, Hoseini Mariam, Jan-Harm Nieland
  • Publication number: 20220373619
    Abstract: The present invention provides an electric current sensor comprising a substrate and MR sensing circuit. The substrate has a first surface along a first axis and a second axis. The MR sensing circuit is utilized to detect a magnetic filed about a third axis. The MR sensing circuit is formed onto the first surface and has a plurality of MR sensor pairs. Each MR sensor in each MR sensor pair has a plurality of conductive structures, wherein the conductive structures of one MR sensor are symmetrically arranged. Alternatively, the present invention provides an electric current sensing device using a pair of electric sensors symmetrically arranged at two lateral sides of a conductive wire having an electric current flowing therethrough for eliminating the magnetic field along Z axis generated by external environment.
    Type: Application
    Filed: May 3, 2022
    Publication date: November 24, 2022
    Inventors: Nai-Chung Fu, Chien-He Hou, Chih-Chao Shih, Fu-Tai Liou
  • Patent number: 10116318
    Abstract: A method and apparatus are disclosed for asynchronous clock generation in analog-to-digital converters (ADCs). For example, an ADC may comprise a comparator, a first logic gate, a second logic gate, a first memory element, a second memory element, and a digital-to-analog converter (DAC). The comparator may initiate an evaluation or precharge operation of comparator inputs. The first logic gate may generate, based on comparator outputs, a first output signal indicating validity of first logic gate output. The second logic gate may generate a second output signal indicating timing reference of bit conversion. The first memory element may generate a third output signal indicating a current state of a bit. The second memory element may generate a plurality of next state bits based on the second output signal and the comparator outputs. The second logic gate may generate the second output signal based on the first and third output signals.
    Type: Grant
    Filed: September 5, 2017
    Date of Patent: October 30, 2018
    Assignee: Infinera Corporation
    Inventors: Shah Sharif, Fu-Tai An
  • Patent number: 9921269
    Abstract: A comparison device for comparing test pattern files of a wafer tester includes a storage unit and a processing unit. The comparison device stores a first to-be-compared file and a second to-be-compared file into the storage unit. The processing unit reads the first to-be-compared file and the second to-be-compared file from the storage unit to process and executes comparison operation, so as to generate a comparison result. The comparison operation compares the words in a first section of the first to-be-compared file with the words in a second section of the second to-be-compared file in a one-to-one manner, wherein, if the first section ending point is not the end of the first to-be-compared file or the second section ending point is not the end of the second to-be-compared file, the processing unit resets the first section and the second section, and executes comparison operation again.
    Type: Grant
    Filed: November 17, 2014
    Date of Patent: March 20, 2018
    Assignee: KING YUAN ELECTRONICS CO., LTD.
    Inventor: Fu-Tai Chen
  • Patent number: 9813071
    Abstract: A scaling apparatus and method for compensating nonlinearity due to the finite output impedance of current sources in current-steering digital-to-analog converters (DACs) are disclosed herein. In an example, a DAC may receive a digital input signal. The DAC may determine an output current weight for each of a plurality of unit cells, based on an output impedance of the unit cell. Further, the DAC may generate an analog output signal by applying the plurality of output current weights to the digital input signal. Then, the DAC may output the analog output signal. The analog output signal may be a high frequency analog output signal, which may be an optical high frequency analog output signal. In an example, a transfer curve of the analog output signal may be linear in terms of analog output signal voltage versus digital input code. The output current weights may include one or more polynomial terms.
    Type: Grant
    Filed: December 29, 2016
    Date of Patent: November 7, 2017
    Assignee: Infinera Corporation
    Inventors: Fu-Tai An, Vassili Kireev, Jeffrey Bostak
  • Patent number: 9651636
    Abstract: A single-chip three-axis magnetic field sensing device is provided. This single-chip three-axis magnetic field sensing device comprises a substrate, a first sensing module, a second sensing module, a third sensing module and at least one coil. The substrate includes a surface. The first sensing module comprises at least one first magnetoresistive element and is configured to sense a first magnetic field component substantially parallel to the surface. The second sensing module comprises at least one second magnetoresistive element and is configured to sense a second magnetic field component substantially parallel to the surface. The third sensing module comprises at least one third magnetoresistive element and is configured to sense a third magnetic field component substantially perpendicular to the surface. Wherein one of the first magnetoresistive element and the second magnetoresistive element and the third magnetoresistive element is disposed right above or right below the at least one coil.
    Type: Grant
    Filed: August 29, 2013
    Date of Patent: May 16, 2017
    Assignee: Voltafield Technology Corp.
    Inventors: Nai-Chung Fu, Fu-Tai Liou, Jia-Mou Lee
  • Patent number: 9558670
    Abstract: A dynamic constraint avoidance route system automatically analyzes routes of aircraft flying, or to be flown, in or near constraint regions and attempts to find more time and fuel efficient reroutes around current and predicted constraints. The dynamic constraint avoidance route system continuously analyzes all flight routes and provides reroute advisories that are dynamically updated in real time. The dynamic constraint avoidance route system includes a graphical user interface that allows users to visualize, evaluate, modify if necessary, and implement proposed reroutes.
    Type: Grant
    Filed: June 15, 2015
    Date of Patent: January 31, 2017
    Assignee: The United States of America as Represented by the Administrator of the National Aeronautics and Space Administration
    Inventors: Kapil S. Sheth, B. David McNally, Heinz Erzberger, Alexander R. Morando, Alexis A. Clymer, Fu-tai Shih
  • Patent number: 9553592
    Abstract: A circuit for generating a divided clock signal with a configurable phase offset comprises a first latch circuit adapted to receive a clock signal to be divided; a second latch coupled to an output of the first latch circuit and generating a divided output clock signal; and an initialization circuit coupled to the first latch circuit and the second latch circuit, the initialization circuit coupled to receive an initialization signal. The initialization signal determines a phase offset between the divided output clock signal and the clock signal to be divided. A method of generating a divided clock signal is also described.
    Type: Grant
    Filed: March 5, 2015
    Date of Patent: January 24, 2017
    Assignee: XILINX, INC.
    Inventors: Aman Sewani, Fu-Tai An, Parag Upadhyaya
  • Patent number: 9543509
    Abstract: A magnetoresistive structure includes a substrate and a patterned stack structure. The substrate has a back surface and a front surface having a step portion. The patterned stack structure is on the step portion of the front surface and comprises a magnetoresistive layer, a conductive cap layer and a dielectric hard mask layer. The step portion has a top surface parallel to the back surface, a bottom surface parallel to the back surface and a step height joining the top surface and bottom surface and being not parallel to the back surface.
    Type: Grant
    Filed: October 22, 2013
    Date of Patent: January 10, 2017
    Assignee: Voltafield Technology Corp.
    Inventors: Fu-Tai Liou, Chien-Min Lee, Nai-Chung Fu
  • Patent number: 9490810
    Abstract: AFE circuitry handles both voltage and current input signals. In one embodiment, both a voltage path and a current path are provided from the input. Switching circuitry selects one of the paths. A switch also turns on or off a current-to-voltage conversion circuit used to convert a current input into a voltage. In one embodiment, noise is significantly reduced by using a dedicated ground pin or terminal for the negative reference of a differential circuit. This applies the same external board noise, which is on the input signal, to the negative reference, so the noise is canceled in the differential signal. In one embodiment, temperature compensation is provided via an IPTAT circuit which is used to shift the voltage up in order to balance the decrease in DC voltage with increasing temperature.
    Type: Grant
    Filed: January 17, 2014
    Date of Patent: November 8, 2016
    Assignee: Marvell International Ltd.
    Inventors: Fu-Tai An, Yingxuan Li, Yonghua Song
  • Patent number: 9335386
    Abstract: A magnetoresistive component comprises a horizontal magnetoresistive layer and a nonparallel magnetoresistive layer. The horizontal magnetoresistive layer is disposed above a surface of a substrate and has a first side and a second side opposite the first side, along its extending direction. The nonparallel magnetoresistive layer is not parallel to the surface of the substrate and is physically connected to the horizontal magnetoresistive layer at the first side of the horizontal magnetoresistive layer.
    Type: Grant
    Filed: April 28, 2014
    Date of Patent: May 10, 2016
    Assignee: Voltafield Technology Corp.
    Inventors: Nai-Chung Fu, Kuang-Ching Chen, Fu-Tai Liou
  • Patent number: 9237041
    Abstract: A method relates generally to data reception for any of a plurality of data rates. In such a method, information and phases of a clock signal are obtained by a decision feedback equalizer. The information is equalized using the phases of the clock signal with the decision feedback equalizer to provide equalized sample streams. The equalized sample streams and the phases of the clock signal are provided to a selection circuit block. A first and a second phase of the phases are swapped, along with swapping a first and a second equalized sample stream corresponding to the first phase and the second phase, responsive to a data rate of the plurality of data rates.
    Type: Grant
    Filed: January 21, 2015
    Date of Patent: January 12, 2016
    Assignee: XILINX, INC.
    Inventors: Fu-Tai An, Didem Z. Turker Melek, Yuan-Shih Chen
  • Patent number: 9224939
    Abstract: A tunneling magnetoresistance sensor includes a substrate, an insulating layer, a tunneling magnetoresistance component and a first electrode array. The insulating layer is disposed on the substrate. The tunneling magnetoresistance component is in contact with the insulating layer and includes at least one magnetic tunneling junction unit. The first electrode array disposed in direct contact with the insulating layer. The first electrode array includes a number of first electrodes. Each of the at least one magnetic tunneling junction unit is electrically connected to two neighboring first electrodes of the first electrode array to form a current-in-plane tunneling conduction mode.
    Type: Grant
    Filed: December 23, 2013
    Date of Patent: December 29, 2015
    Assignee: VOLTAFIELD TECHNOLOGY CORPORATION
    Inventors: Chien-Min Lee, Kuang-Ching Chen, Fu-Tai Liou
  • Publication number: 20150340594
    Abstract: The present invention relates to an anisotropic magnetoresistive (AMR) device which comprises a substrate, an interconnect structure and a magnetoresistive material layer. The interconnect structure is disposed above the substrate and comprises a plurality of metal interconnect layers. The magnetoresistive material layer is disposed above the interconnect structure. The topmost metal interconnect layer of the plurality of metal interconnect layers comprises a conductive current-shunting structure. The conductive current-shunting structure is physically connected to the magnetoresistive layer without a conductive via plug.
    Type: Application
    Filed: August 8, 2014
    Publication date: November 26, 2015
    Inventors: Fu-Tai Liou, Chien-Min Lee
  • Patent number: 9182458
    Abstract: A magnetoresistive sensing device includes a substrate, a magnetic layer, a first electrode and a second electrode. The substrate has a reference plane. The first electrode and a second electrode are disposed over the reference plane. The magnetic layer is disposed over the reference plane and has a magnetization direction. A non-straight angle is formed between the magnetic layer and the reference plane. The first electrode and the second electrode are electrically connected with each other through an electric pathway of the magnetic layer. An included angle is formed between the electric pathway and the magnetization direction. Consequently, the magnetoresistive sensing device is capable of measuring a magnetic field change in a Z-axis direction, which is perpendicular to a reference plane.
    Type: Grant
    Filed: January 9, 2013
    Date of Patent: November 10, 2015
    Assignee: VOLTAFIELD TECHNOLOGY CORPORATION
    Inventors: Chien-Min Lee, Fu-Tai Liou, Ta-Yung Wong
  • Patent number: 9128141
    Abstract: A magnetoresistive sensing device includes a substrate, a magnetoresistive sensing element, a circuitry element and a shielding unit. The magnetoresistive sensing element, the circuitry element and the shielding unit are disposed at the same side of the substrate. The shielding unit is between the magnetoresistive sensing element and the circuitry element. The shielding unit comprises at least one magnetic material.
    Type: Grant
    Filed: December 14, 2012
    Date of Patent: September 8, 2015
    Assignee: Voltafield Technology Corp.
    Inventors: Fu-Tai Liou, Nai-Chung Fu