Abstract: The present disclosure relates to a solid-state imaging element, an imaging device, and an electronic device capable of improving light-receiving sensitivity. An avalanche region is formed by forming a P+ type semiconductor region connected to an anode into an annular structure having a hole at a center portion at a pixel center as seen in an incident direction of incident light, and forming an N+ type semiconductor region connected to a cathode at a subsequent stage as seen in the incident direction of the hole. This may be applied to an avalanche photodiode.

Abstract: The present technology relates to a solid-state imaging apparatus and a driving method that can perform imaging at lower power consumption. By providing the solid-state imaging apparatus including a pixel array section on which a plurality of SPAD pixels is two-dimensionally arranged, in which in a case where illuminance becomes first illuminance higher than reference illuminance, a part of the SPAD pixels of the plurality of pixels arranged on the pixel array section is thinned, it is possible to image at lower power consumption. The present technology can be applied to an image sensor, for example.

Abstract: The present technology relates to a solid-state imaging apparatus and a driving method that can perform imaging at lower power consumption. By providing the solid-state imaging apparatus including a pixel array section on which a plurality of SPAD pixels is two-dimensionally arranged, in which in a case where illuminance becomes first illuminance higher than reference illuminance, a part of the SPAD pixels of the plurality of pixels arranged on the pixel array section is thinned, it is possible to image at lower power consumption. The present technology can be applied to an image sensor, for example.

Abstract: The present technology relates to a solid-state imaging apparatus and a driving method that can perform imaging at lower power consumption. By providing the solid-state imaging apparatus including a pixel array section on which a plurality of SPAD pixels is two-dimensionally arranged, in which in a case where illuminance becomes first illuminance higher than reference illuminance, a part of the SPAD pixels of the plurality of pixels arranged on the pixel array section is thinned, it is possible to image at lower power consumption. The present technology can be applied to an image sensor, for example.

Abstract: The present technology relates to a solid-state imaging apparatus and a driving method that can perform imaging at lower power consumption. By providing the solid-state imaging apparatus including a pixel array section on which a plurality of SPAD pixels is two-dimensionally arranged, in which in a case where illuminance becomes first illuminance higher than reference illuminance, a part of the SPAD pixels of the plurality of pixels arranged on the pixel array section is thinned, it is possible to image at lower power consumption. The present technology can be applied to an image sensor, for example.

Abstract: The present technology relates to a solid-state imaging apparatus and a driving method that can perform imaging at lower power consumption. By providing the solid-state imaging apparatus including a pixel array section on which a plurality of SPAD pixels is two-dimensionally arranged, in which in a case where illuminance becomes first illuminance higher than reference illuminance, a part of the SPAD pixels of the plurality of pixels arranged on the pixel array section is thinned, it is possible to image at lower power consumption. The present technology can be applied to an image sensor, for example.

Abstract: The present technology relates to a solid-state imaging apparatus and a driving method that can perform imaging at lower power consumption. By providing the solid-state imaging apparatus including a pixel array section on which a plurality of SPAD pixels is two-dimensionally arranged, in which in a case where illuminance becomes first illuminance higher than reference illuminance, a part of the SPAD pixels of the plurality of pixels arranged on the pixel array section is thinned, it is possible to image at lower power consumption. The present technology can be applied to an image sensor, for example.

Abstract: Certain embodiments provide a solid-state imaging apparatus including a first impurity layer, a second impurity layer, a third impurity layer, and an electrode. The first impurity layer is a photoelectric conversion layer, and is formed to have a constant depth on a semiconductor substrate. The second impurity layer is formed on a surface of the first impurity layer, to have a depth which becomes shallower toward a direction from the first impurity layer to the third impurity layer. The third impurity layer is formed in a position spaced apart from the first impurity layer and the second impurity layer on the surface of the semiconductor substrate. The electrode can transport electric charges from the first impurity layer to the third impurity layer, and is formed between the second impurity layer and the third impurity layer, on the surface of the semiconductor substrate.

Abstract: Certain embodiments provide a solid-state imaging apparatus including a first impurity layer, a second impurity layer, a third impurity layer, and an electrode. The first impurity layer is a photoelectric conversion layer, and is formed to have a constant depth on a semiconductor substrate. The second impurity layer is formed on a surface of the first impurity layer, to have a depth which becomes shallower toward a direction from the first impurity layer to the third impurity layer. The third impurity layer is formed in a position spaced apart from the first impurity layer and the second impurity layer on the surface of the semiconductor substrate. The electrode can transport electric charges from the first impurity layer to the third impurity layer, and is formed between the second impurity layer and the third impurity layer, on the surface of the semiconductor substrate.

Abstract: Certain embodiments provide a solid-state imaging apparatus including a first impurity layer, a second impurity layer, a third impurity layer, and an electrode. The first impurity layer is a photoelectric conversion layer, and is formed to have a constant depth on a semiconductor substrate. The second impurity layer is formed on a surface of the first impurity layer, to have a depth which becomes shallower toward a direction from the first impurity layer to the third impurity layer. The third impurity layer is formed in a position spaced apart from the first impurity layer and the second impurity layer on the surface of the semiconductor substrate. The electrode can transport electric charges from the first impurity layer to the third impurity layer, and is formed between the second impurity layer and the third impurity layer, on the surface of the semiconductor substrate.

Abstract: According to one embodiment, a cell includes 2N pixels configured to accumulate charges generated based on incident light, an amplifier transistor is formed for each the cell and amplifies, for each of the pixels, signals read out from the pixels to a floating diffusion, and charge coupled devices transfer the charges accumulated in the pixels to the floating diffusion.

Abstract: Certain embodiments provide a solid-state imaging apparatus including a first impurity layer, a second impurity layer, a third impurity layer, and an electrode. The first impurity layer is a photoelectric conversion layer, and is formed to have a constant depth on a semiconductor substrate. The second impurity layer is formed on a surface of the first impurity layer, to have a depth which becomes shallower toward a direction from the first impurity layer to the third impurity layer. The third impurity layer is formed in a position spaced apart from the first impurity layer and the second impurity layer on the surface of the semiconductor substrate. The electrode can transport electric charges from the first impurity layer to the third impurity layer, and is formed between the second impurity layer and the third impurity layer, on the surface of the semiconductor substrate.

Abstract: According to one embodiment, a cell includes 2N pixels configured to accumulate charges generated based on incident light, an amplifier transistor is formed for each the cell and amplifies, for each of the pixels, signals read out from the pixels to a floating diffusion, and charge coupled devices transfer the charges accumulated in the pixels to the floating diffusion.

Abstract: A transfer gate is formed such that both end portions thereof in a second direction, which crosses a first direction in which a photodiode and a floating diffusion layer that is formed with a distance from the photodiode are arranged, are located inside boundaries with element isolation regions. Channel stopper layers are formed on surface portions of a device region in the vicinity of lower parts of both end portions of the transfer gate in the second direction in such a manner to extend to the boundaries with the element isolation regions.

Abstract: On the assumption that pressure Pm1 (MPa) of a boss portion outside space determined by a restrictor and a flow regulating valve provided midway in an oil feed passageway is expressed by Pm1=Ps+&agr;, and a differential pressure value at which a difference between high and low pressures becomes minimum in a running pressure range of a scroll compressor is represented by min(Pd−Ps), the value a in the above expression is set to fall in a range expressed by 0<&agr;<min(Pd−Ps). Here, Ps represents suction pressure (MPa) of the compressor, and Pd represents discharge pressure (MPa) of the compressor.

Abstract: A compressor includes a compression mechanism part for compressing refrigerant sucked from an outside of the hermetic container and discharging compressed refrigerant to a discharge space, an electric motor part composed of a stator and a rotor, facing a first space which is at an opposite side of the discharge space with respect to the compression mechanism part in the hermetic container, for driving the compression mechanism part through a main shaft, a passage at an external circumferential side of the compression mechanism part, for connecting the discharge space with the first space, and a fan provided at an end of the rotor, facing the first space. The refrigerant discharged into the discharge space passes through the passage at the external circumferential side of the compression mechanism part to reach the first space, and passes the fan to be discharged to the outside of the hermetic container.

Abstract: A scroll compressor including a guide frame (22) for fixing a fixed scroll member (12) and a compliant frame (24) for supporting an oscillating scroll member (14) in the axial direction of the scroll compressor in the guide frame (22), wherein the guide frame (22) has a plurality of cylindrical surfaces (33, 35), and the compliant frame (24) has a plurality of cylindrical surfaces (23, 25) which engage with the cylindrical surfaces (33, 35), and wherein in order to facilitate assembling of the guide frame (22) and the compliant frame (24), the first cylindrical surfaces (25, 35) are first engaged with each other when the compliant frame (24) is inserted into the guide frame (22), that is, the cylindrical surfaces are engaged in the order of increase in diameter.

Abstract: A structure is provided that prevents excessive force from acting on a fastening portion where a guide frame is fastened to a sealed container. A fastening position of the guide frame and sealed structure is set within a range bounded by an upper meshing circumferential inner surface of the guide frame together with an upper meshing circumferential outer surface of a compliant frame and a lower meshing circumferential inner surface of the guide frame together with a lower meshing circumferential outer surface of the compliant frame.

Abstract: According to a scroll compressor of the present invention, at least one of a diameter space between an upper fitting surface of the guide frame and an upper fitting surface of the compliant frame at an upper fitting part where the upper fitting surface of the guide frame contacts with the upper fitting surface of the compliant frame, and a diameter space between a lower fitting surface of the guide frame and a lower fitting surface of the compliant frame at a lower fitting part where the lower fitting surface of the guide frame contacts with the lower fitting surface of the compliant frame is set to be equal to or shorter than a diameter space between the rotor and the stator.

Abstract: A refrigerant compressor improved in pressure-resistant strength of a closed vessel. In a prior-art refrigerant compressor, a three-phase integral type sealed terminal in which three pins connected to a three-phase power source are disposed on one metal base portion, is attached to a body portion of a closed vessel for supplying electric power to an electric motor. When a high hydrostatic pressure load is applied to the closed vessel, the closed vessel is deformed into a barrel shape, and the sealed terminal pulled in the circumferential direction due to the deformation of the closed vessel is deformed elliptically. There may arise a problem with a glass material for insulating the metal base portion from the pins.