Patents by Inventor Fumihiko Taniguchi
Fumihiko Taniguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9627289Abstract: The present invention is to provide a semiconductor device in which the generation of the eddy current in a metal flat plate is reduced, and the Q value of the RF circuit of the semiconductor device is improved even using the metal flat plate as a support.Type: GrantFiled: December 9, 2015Date of Patent: April 18, 2017Assignee: J-DEVICES CORPORATIONInventors: Yoshihiko Ikemoto, Shigenori Sawachi, Fumihiko Taniguchi, Akio Katsumata
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Publication number: 20160181194Abstract: The present invention is to provide a semiconductor device in which the generation of the eddy current in a metal flat plate is reduced, and the Q value of the RF circuit of the semiconductor device is improved even using the metal flat plate as a support.Type: ApplicationFiled: December 9, 2015Publication date: June 23, 2016Inventors: Yoshihiko IKEMOTO, Shigenori SAWACHI, Fumihiko TANIGUCHI, Akio KATSUMATA
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Patent number: 7192798Abstract: A fingerprint sensor apparatus can provide a normal fingerprint sensor function even when a mold flash is formed. The fingerprint sensor apparatus recognizes a pattern of a fingerprint by being contacted by a finger. A semiconductor chip has a surface on which a sensor part is formed. The semiconductor chip is encapsulated by a seal resin. The sensor part is exposed in a bottom of an opening formed in the seal resin part. A distance between an edge of the bottom of the opening and an edge of the sensor part is 0.3 mm to 0.1 mm.Type: GrantFiled: November 7, 2002Date of Patent: March 20, 2007Assignee: Fujitsu LimitedInventors: Akira Okada, Hideharu Sakoda, Michio Hayakawa, Fumihiko Taniguchi
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Patent number: 7193862Abstract: In recent years, ceramic laminated devices are becoming a focus of great attention as considerable contribution to the miniaturization of high frequency wireless equipment such as a cellular phone, but it is difficult for the conventional ceramic laminated device to secure reliability while maintaining favorable high frequency characteristics. The present invention provides a ceramic laminated device including a reinforcement electrode, which is formed inside a laminated body in which a plurality of ceramic layers, a plurality of inner electrodes and inter-layer via holes are stacked, not electrically connected with inner electrodes nor inter-layer via holes but mechanically connected with the ceramic layers.Type: GrantFiled: May 20, 2003Date of Patent: March 20, 2007Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Tomoya Maekawa, Hiroshi Shigemura, Fumihiko Taniguchi
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Publication number: 20060226529Abstract: The present invention relates to a semiconductor device having an MCP (Multi Chip Package) structure in which a plurality of semiconductor chips are mounted in the same package, a manufacturing method therefor and a semiconductor substrate used therein. Atop a first semiconductor chip that is a memory chip is mounted a second semiconductor chip that is a logic chip, with a first functional chip and a second functional chip that together form the first semiconductor chip being joined together via an unsliced scribe line. Additionally, a first functional chip and a second functional chip are given the same chip composition (32-bit memory) and respectively rotated 180 degrees relative to each other. These configurations are intended to improve performance, reduce costs and improve yield.Type: ApplicationFiled: June 8, 2006Publication date: October 12, 2006Applicant: FUJITSU LIMITEDInventors: Yoshiharu Kato, Satoru Kawamoto, Fumihiko Taniguchi, Tetsuya Hiraoka, Akira Takashima
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Patent number: 6972487Abstract: The present invention relates to a semiconductor device having an MCP (Multi Chip Package) structure in which a plurality of semiconductor chips are mounted in the same package, a manufacturing method therefor and a semiconductor Substrate used therein. Atop a first semiconductor chip that is a memory chip is mounted a second Semiconductor chip that is a logic chip, with a first functional chip and a second functional chip that together form the first semiconductor chip being joined together via an unsliced scribe line. Additionally, a first functional chip and a second functional chip are given the same chip composition (32-bit memory) and respectively rotated 180 degrees relative to each other. These configurations are intended to improve performance, reduce costs and improve yield.Type: GrantFiled: January 25, 2002Date of Patent: December 6, 2005Assignee: Fujitsu LimitedInventors: Yoshiharu Kato, Satoru Kawamoto, Fumihiko Taniguchi, Tetsuya Hiraoka, Akira Takashima
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Publication number: 20050161794Abstract: The present invention relates to a semiconductor device having an MCP (Multi Chip Package) structure in which a plurality of semiconductor chips are mounted in the same package, a manufacturing method therefor and a semiconductor substrate used therein. Atop a first semiconductor chip that is a memory chip is mounted a second semiconductor chip that is a logic chip, with a first functional chip and a second functional chip that together form the first semiconductor chip being joined together via an unsliced scribe line. Additionally, a first functional chip and a second functional chip are given the same chip composition (32-bit memory) and respectively rotated 180 degrees relative to each other. These configurations are intended to improve performance, reduce costs and improve yield.Type: ApplicationFiled: March 16, 2005Publication date: July 28, 2005Applicant: Fujitsu LimitedInventors: Yoshiharu Kato, Satoru Kawamoto, Fumihiko Taniguchi, Tetsuya Hiraoka, Akira Takashima
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Patent number: 6812066Abstract: A semiconductor device comprises: a semiconductor element; an external terminal used for an external connection; an interposer having the semiconductor element mounted on a first surface thereof and having the external terminal formed on a second surface thereof opposite to the first surface so as to electrically connect the semiconductor element and the external terminal; a resin sealing the semiconductor element on the first surface; and an interconnecting portion formed within the resin, the interconnecting portion having a first connecting part electrically connected to the external terminal and having a second connecting part exposed on an outer surface of the resin.Type: GrantFiled: October 24, 2002Date of Patent: November 2, 2004Assignee: Fujitsu LimitedInventors: Fumihiko Taniguchi, Akira Takashima
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Publication number: 20040055693Abstract: In recent years, ceramic laminated devices are becoming a focus of great attention as considerable contribution to the miniaturization of high frequency wireless equipment such as a cellular phone, but it is difficult for the conventional ceramic laminated device to secure reliability while maintaining favorable high frequency characteristics. The present invention provides a ceramic laminated device including a reinforcement electrode, which is formed inside a laminated body in which a plurality of ceramic layers, a plurality of inner electrodes and inter-layer via holes are stacked, not electrically connected with inner electrodes nor inter-layer via holes but mechanically connected with the ceramic layers.Type: ApplicationFiled: May 20, 2003Publication date: March 25, 2004Inventors: Tomoya Maekawa, Hiroshi Shigemura, Fumihiko Taniguchi
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Patent number: 6670221Abstract: In a semiconductor device having a built-in contact-type sensor, a height of a surrounding part of a sensor part from the exposed surface of the sensor part is reduced. The semiconductor device has a semiconductor element having a built-in sensor. The semiconductor element has a circuit forming surface and a back surface opposite to the circuit forming surface. The contact-type sensor and electrodes are formed on the circuit forming surface. Back electrodes are formed on the back surface. Conductive members extend through the semiconductor device from the electrodes to the back electrodes. A protective film covers the circuit forming surface in a state where the surface of the contact-type sensor is exposed. External connection terminals are electrically connected to the back electrodes.Type: GrantFiled: October 3, 2002Date of Patent: December 30, 2003Assignee: Fujitsu LimitedInventors: Hideharu Sakoda, Fumihiko Taniguchi
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Patent number: 6629462Abstract: An acceleration sensor housed in a confined space can detect rotational acceleration with great accuracy. The acceleration sensor has first and second piezoelectric elements with electrodes for outputting a charge produced by strain deformation. Each of the first and second piezoelectric elements has at least one piezoelectric body and a support block for supporting the piezoelectric body. The electrodes are provided on opposite sides of the piezoelectric body. One surface of the first piezoelectric element and one surface of the second piezoelectric element are substantially parallel to each other.Type: GrantFiled: July 20, 2001Date of Patent: October 7, 2003Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Tetsuro Otsuchi, Takafumi Koike, Fumihiko Taniguchi
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Publication number: 20030178714Abstract: In a semiconductor device having a built-in contact-type sensor, a height of a surrounding part of a sensor part from the exposed surface of the sensor part is reduced. The semiconductor device has a semiconductor element having a built-in sensor. The semiconductor element has a circuit forming surface and a back surface opposite to the circuit forming surface. The contact-type sensor and electrodes are formed on the circuit forming surface. Back electrodes are formed on the back surface. Conductive members extend through the semiconductor device from the electrodes to the back electrodes. A protective film covers the circuit forming surface in a state where the surface of the contact-type sensor is exposed. External connection terminals are electrically connected to the back electrodes.Type: ApplicationFiled: October 3, 2002Publication date: September 25, 2003Applicant: FUJITSU LIMITEDInventors: Hideharu Sakoda, Fumihiko Taniguchi
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Publication number: 20030156743Abstract: A fingerprint sensor apparatus can provide a normal fingerprint sensor function even when a mold flash is formed. The fingerprint sensor apparatus recognizes a pattern of a fingerprint by being contacted by a finger. A semiconductor chip has a surface on which a sensor part is formed. The semiconductor chip is encapsulated by a seal resin. The sensor part is exposed in a bottom of an opening formed in the seal resin part. A distance between an edge of the bottom of the opening and an edge of the sensor part is 0.3 mm to 0.1 mm.Type: ApplicationFiled: November 7, 2002Publication date: August 21, 2003Applicant: FUJITSU LIMITEDInventors: Akira Okada, Hideharu Sakoda, Michio Hayakawa, Fumihiko Taniguchi
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Publication number: 20030042564Abstract: A semiconductor device comprises: a semiconductor element; an external terminal used for an external connection; an interposer having the semiconductor element mounted on a first surface thereof and having the external terminal formed on a second surface thereof opposite to the first surface so as to electrically connect the semiconductor element and the external terminal; a resin sealing the semiconductor element on the first surface; and an interconnecting portion formed within the resin, the interconnecting portion having a first connecting part electrically connected to the external terminal and having a second connecting part exposed on an outer surface of the resin.Type: ApplicationFiled: October 24, 2002Publication date: March 6, 2003Applicant: Fujitsu LimitedInventors: Fumihiko Taniguchi, Akira Takashima
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Patent number: 6489676Abstract: A semiconductor device comprises: a semiconductor element; an external terminal used for an external connection; an interposer having the semiconductor element mounted on a first surface thereof and having the external terminal formed on a second surface thereof opposite to the first surface so as to electrically connect the semiconductor element and the external terminal; a resin sealing the semiconductor element on the first surface; and an interconnecting portion formed within the resin, the interconnecting portion having a first connecting part electrically connected to the external terminal and having a second connecting part exposed on an outer surface of the resin.Type: GrantFiled: April 30, 2001Date of Patent: December 3, 2002Assignee: Fujitsu LimitedInventors: Fumihiko Taniguchi, Akira Takashima
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Patent number: 6472746Abstract: In a semiconductor element stacking structure, each electrode of each of the stacked semiconductor elements can be drawn out with a simple structure. A plurality of semiconductor elements are arranged in a stacked state, each of the semiconductor elements having a circuit forming surface on which electrodes are formed. A resin layer is formed on the circuit forming surface of each of the semiconductor elements. The resin layer has an outer configuration the same as that of each of the semiconductor elements. A plurality of bonding wires are embedded in the resin layer. One end of the each of the bonding wires is connected to respective one of the electrodes and the other end of each of the bonding wires is exposed on a side surface of the resin layer.Type: GrantFiled: January 30, 2001Date of Patent: October 29, 2002Assignee: Fujitsu LimitedInventors: Fumihiko Taniguchi, Akira Takashima
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Publication number: 20020140107Abstract: The present invention relates to a semiconductor device having an MCP (Multi Chip Package) structure in which a plurality of semiconductor chips are mounted in the same package, a manufacturing method therefor and a semiconductor substrate used therein. Atop a first semiconductor chip that is a memory chip is mounted a second semiconductor chip that is a logic chip, with a first functional chip and a second functional chip that together form the first semiconductor chip being joined together via an unsliced scribe line. Additionally, a first functional chip and a second functional chip are given the same chip composition (32-bit memory) and respectively rotated 180 degrees relative to each other. These configurations are intended to improve performance, reduce costs and improve yield.Type: ApplicationFiled: January 31, 2002Publication date: October 3, 2002Applicant: Fujitsu LimitedInventors: Yoshiharu Kato, Satoru Kawamoto, Fumihiko Taniguchi, Tetsuya Hiraoka, Akira Takashima
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Patent number: 6404062Abstract: A semiconductor device includes a semiconductor chip, solder balls, a printed wiring substrate on which the semiconductor chip is provided and which serves to electrically connect the semiconductor chip and the solder balls. When such a semiconductor device is mounted on a motherboard, at least one through-aperture is in advance formed on the printed wiring substrate oppositely to the semiconductor chip. After the solder balls are soldered to the motherboard, an under-filler is introduced from either of a space between the semiconductor chip and the printed wiring substrate or a space between the printed wiring substrate and the motherboard, thus flowing from one space into the other space via the through-aperture.Type: GrantFiled: January 27, 2000Date of Patent: June 11, 2002Assignee: Fujitsu LimitedInventors: Fumihiko Taniguchi, Sachiko Nogami, Akira Takashima
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Publication number: 20020066952Abstract: A semiconductor device comprises: a semiconductor element; an external terminal used for an external connection; an interposer having the semiconductor element mounted on a first surface thereof and having the external terminal formed on a second surface thereof opposite to the first surface so as to electrically connect the semiconductor element and the external terminal; a resin sealing the semiconductor element on the first surface; and an interconnecting portion formed within the resin, the interconnecting portion having a first connecting part electrically connected to the external terminal and having a second connecting part exposed on an outer surface of the resin.Type: ApplicationFiled: April 30, 2001Publication date: June 6, 2002Applicant: Fujitsu LimitedInventors: Fumihiko Taniguchi, Akira Takashima
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Patent number: 6388333Abstract: A plurality of semiconductor devices can be mounted on a mounting board in a three-dimensional structure by stacking one on another with a simple structure. A semiconductor element is mounted on a first surface of an interposer. Electrode pads connected to the semiconductor element are arranged around the semiconductor element on the first surface of the interposer. Protruding electrodes are provided on the respective electrode pads. Through holes are formed in the interposer so as to extend from a second surface opposite to the first surface of the redistribution substrate to the respective electrode pads. The semiconductor element is encapsulated by a seal resin. Each of the protruding electrodes is higher than the sealed portion of the semiconductor element.Type: GrantFiled: June 27, 2000Date of Patent: May 14, 2002Assignee: Fujitsu LimitedInventors: Fumihiko Taniguchi, Kouhei Orikawa, Tadashi Uno, Fumihiko Ando, Akira Takashima, Hiroshi Onodera, Eiji Yoshida, Kazuo Teshirogi