Patents by Inventor Fumiko Yamada

Fumiko Yamada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8441880
    Abstract: Operational stability of the nonvolatile memory in plural power supply voltage modes set up in advance corresponding to the power supply voltage level is realized. A nonvolatile memory is configured with a memory array, a charge pump, a distributor for selecting an output voltage of the charge pump, and a sequencer for controlling operation of the charge pump and the distributor. The nonvolatile memory is also provided with an analyzer which notifies the sequencer of a power supply voltage mode selectively specified among plural power supply voltage modes set up in advance corresponding to power supply voltage levels, and which detects mismatch between the power supply voltage mode notified to the sequencer and an actually supplied power supply voltage and limits the operation of the charge pump and the distributor with the use of the sequencer, based on the detection result. An operational stability of the nonvolatile memory is realized.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: May 14, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Toru Matsushita, Ken Matsubara, Takashi Iwase, Hidenori Mitani, Jun Setogawa, Fumiko Yamada
  • Publication number: 20120002498
    Abstract: Operational stability of the nonvolatile memory in plural power supply voltage modes set up in advance corresponding to the power supply voltage level is realized. A nonvolatile memory is configured with a memory array, a charge pump, a distributor for selecting an output voltage of the charge pump, and a sequencer for controlling operation of the charge pump and the distributor. The nonvolatile memory is also provided with an analyzer which notifies the sequencer of a power supply voltage mode selectively specified among plural power supply voltage modes set up in advance corresponding to power supply voltage levels, and which detects mismatch between the power supply voltage mode notified to the sequencer and an actually supplied power supply voltage and limits the operation of the charge pump and the distributor with the use of the sequencer, based on the detection result. Accordingly, operational stability of the nonvolatile memory is realized.
    Type: Application
    Filed: June 29, 2011
    Publication date: January 5, 2012
    Inventors: Toru Matsushita, Ken Matsubara, Takashi Iwase, Hidenori Mitani, Jun Setogawa, Fumiko Yamada