Abstract: When a wireless communication device is receiving, a baseband circuit generates frequency domain LTE and WCDMA signals using a Fourier transform. The frequency domain WCDMA signal is then filtered with an RRC filter and converted back to the time domain using an inverse discrete Fourier transform. During transmission, the baseband circuit uses a Fourier transform to convert a time domain WCDMA signal to a frequency domain WCDMA signal. The frequency domain WCDMA signal is then filtered with an RRC filter and combined with a frequency domain LTE signal using an inverse Fourier Transform.

Abstract: When a wireless communication device is receiving, a baseband circuit generates frequency domain LTE and WCDMA signals using a Fourier transform. The frequency domain WCDMA signal is then filtered with an RRC filter and converted back to the time domain using an inverse discrete Fourier transform. During transmission, the baseband circuit uses a Fourier transform to convert a time domain WCDMA signal to a frequency domain WCDMA signal. The frequency domain WCDMA signal is then filtered with an RRC filter and combined with a frequency domain LTE signal using an inverse Fourier Transform.

Abstract: A receiver system, which generates a soft decision signal from a hard decision signal, includes a hard output receiver for determining a received bit to generate a hard decision signal. A hard input soft output receiver determines an estimated probability of symbol data corresponding to the received bit based on the hard decision signal and generates a soft decision signal represented by a log-likelihood ratio from the estimated probability.

Abstract: An apparatus, method and program for outputting a present position that enables a user to be located with further accuracy even in a multi-level area. A control unit periodically sends a reference atmospheric pressure information obtaining request to a base station and obtains reference atmospheric pressure information including the atmospheric pressure and altitude of the base station from the base station and stores the obtained information in a data storage. The control unit uses the measurement value of atmospheric pressure obtained from a pressure sensor and an altitude calculation equation including the reference atmospheric pressure information to periodically calculate and record in the data storage the altitude of the present position. When an emergency button is pushed, the control unit issues to an emergency contact an emergency notification including the present altitude or the altitude recorded in the data storage.

Abstract: A receiver system, which generates a soft decision signal from a hard decision signal, includes a hard output receiver for determining a received bit to generate a hard decision signal. A hard input soft output receiver determines an estimated probability of symbol data corresponding to the received bit based on the hard decision signal and generates a soft decision signal represented by a log-likelihood ratio from the estimated probability.

Abstract: A voice processor performing logarithm compression and decompression enabling various signal processing functions to be efficiently added. When there is a ? Law compression input, an approximate logarithm conversion process is performed. The processor performs bit inversion on the ? Law compression value and sets MSB to “0” to obtain an approximate ? log value. The approximate ? log value is then subjected to various basic calculations. With respect to the approximate ? log value, multiplication of linear values is performed through addition, and division is performed through subtraction. Further, the squaring of a linear value is performed by shifting 1 bit toward the right, and square root calculation of a linear value is performed by shifting 1 bit to the left. Also, a twofold of the linear value is calculated by adding “16”. The processor outputs the result to obtaining a ? Law compression output.

Abstract: A wireless communication device, an individual information writing device, and an individual information setting method that efficiently write individual information, such as a unique identifier used for wireless communication, to each wireless device. An address writing device transmits a unique address setting communication request. A wireless device has a control unit that checks whether a provisional address is set in a unique address memory. When a provisional address is set, the control unit measures the signal intensity of a received unique address setting communication request with an electric field intensity measuring unit. When the electric field intensity is greater than a threshold value stored in an address setting condition memory and thereby satisfies an address setting condition, the wireless device performs a process for setting a unique address and then transmits a completion notification to the address writing device.

Abstract: A voice processor performing logarithm compression and decompression enabling various signal processing functions to be efficiently added. When there is a ? Law compression input, an approximate logarithm conversion process is performed. The processor performs bit inversion on the ? Law compression value and sets MSB to “0” to obtain an approximate ? log value. The approximate ? log value is then subjected to various basic calculations. With respect to the approximate ? log value, multiplication of linear values is performed through addition, and division is performed through subtraction. Further, the squaring of a linear value is performed by shifting 1 bit toward the right, and square root calculation of a linear value is performed by shifting 1 bit to the left. Also, a twofold of the linear value is calculated by adding “16”. The processor outputs the result to obtaining a ? Law compression output.

Abstract: A buffer control system and a buffer controllable memory are provided that remedy the problem of increased current consumption at a time of lower clock speed. A buffer control system 10 includes a processor 100 for outputting a memory control signal 500 that determines its on/off time depending upon the clock speed, and an operation mode switching signal 800 that indicates either a high-speed operation mode or low-speed operation mode. An external memory 200, connected to the processor 100, sends and receives data, and has a bus buffer 210 whose on/off time is determined according to a memory control signal 600 input thereto. A buffer controller 900, connected between the processor 100 and external memory 200, contains a timer 400 triggered by the memory control signal 500 from the processor 100.