Patents by Inventor Fumio Kuraishi

Fumio Kuraishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6081426
    Abstract: A semiconductor package uses no thermosetting adhesive for mounting a heat slug thereon, which adhesive requires a strict control during the storage and the production thereof. A semiconductor package comprises a circuit board having respective surfaces and an opening; a conductive layer formed on one of the surfaces of the circuit board so that the conductive layers are retracted from a peripheral edge of the opening by a certain distance; a heat slug attached to the one surface of the circuit board by means of solder so that the opening is closed at the one surface and opened at the other surface to form a cavity within which a semiconductor element mounting area is defined.
    Type: Grant
    Filed: March 17, 1999
    Date of Patent: June 27, 2000
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Yoshiki Takeda, Takemi Machida, Fumio Kuraishi
  • Patent number: 6074567
    Abstract: A semiconductor package includes a laminate of substrates having a cavity 16, through-holes 25 and circuit patterns, wherein the through-holes 45 and some of the circuit patterns 18 are coated with a plated nickel/gold coating 50.
    Type: Grant
    Filed: February 9, 1998
    Date of Patent: June 13, 2000
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Fumio Kuraishi, Toshihisa Yoda, Mitsuharu Shimizu
  • Patent number: 5905634
    Abstract: A semiconductor package uses no thermosetting adhesive for mounting a heat slug thereon, which adhesive requires a strict control during the storage and the production thereof. A semiconductor package comprises a circuit board having respective surfaces and an opening; a conductive layer formed on one of the surfaces of the circuit board so that the conductive layers are retracted from a peripheral edge of the opening by a certain distance; a heat slug attached to the one surface of the circuit board by means of solder so that the opening is closed at the one surface and opened at the other surface to form a cavity within which a semiconductor element mounting area is defined; and the heat slug is provided with a groove along a periphery of the semiconductor element mounting area and adjacent the peripheral edge of the opening.
    Type: Grant
    Filed: September 15, 1997
    Date of Patent: May 18, 1999
    Assignee: Shinko Electric Industries, Co., Ltd.
    Inventors: Yoshiki Takeda, Takemi Machida, Fumio Kuraishi
  • Patent number: 5859471
    Abstract: In a lead frame adapted to be used for a semiconductor device, a plurality of inner leads are made of a thin conductive material for easily forming a fine pattern of the inner leads. A plurality of outer leads are integrally formed with the respective inner leads. The outer leads are coated with metal layers to increase the thickness thereof, so that a desired strength of the outer leads is obtained. A semiconductor chip is electrically connected to the inner leads. The semiconductor chip and a part of the lead frame including the inner leads are hermetically sealed with a resin and, thus, a semiconductor device is obtained.
    Type: Grant
    Filed: October 9, 1997
    Date of Patent: January 12, 1999
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Fumio Kuraishi, Kazuhito Yumoto, Mamoru Hayashi
  • Patent number: 5384204
    Abstract: A tape useful for an automatic bonding process when manufacturing a high-frequency semiconductor device, the tape comprising an insulating flexible film, and circuit patterns consisting of copper or copper-alloy formed on the insulating film, each of the circuit patterns having inner and an outer lead portions. A tin or tin-lead plated film is formed on the pattern, and an intermediate plated film is formed on at least the outer lead portion as an underlayer. The intermediate plated film consists of a metal or metal alloy selected from nickel, cobalt, gold, silver, platinum, palladium, indium or rhodium.
    Type: Grant
    Filed: December 14, 1993
    Date of Patent: January 24, 1995
    Assignee: Shinko Electric Industries Co. Ltd.
    Inventors: Kazuhito Yumoto, Norio Wakabayashi, Masao Nakazawa, Shinichi Wakabayashi, Norio Wada, Fumio Kuraishi, Toshihiko Shimada
  • Patent number: 5365107
    Abstract: A semiconductor device has a semiconductor element mounted on inner leads of a TAB tape and first and second heat radiator elements having respective first and second peripheral flanges which cooperatively engage and thereby support the TAB tape in a sandwich manner therebetween, at least one heat radiator member having a central portion protruding toward and providing a support for the semiconductor element. A sealing resin fills the space between the heat radiator members and thereby integrally interconnects and hermetically seals interior surfaces of the leads of the TAB tape. A central portion of at least one of the heat radiator members protrudes toward and provides a support for the semiconductor element.
    Type: Grant
    Filed: June 4, 1993
    Date of Patent: November 15, 1994
    Assignee: Shinko Electric Industries, Co., Ltd.
    Inventors: Fumio Kuraishi, Norio Wada, Hirofumi Uchida
  • Patent number: 4809053
    Abstract: A plastic molded semiconductor device which includes a metal lead frame having a heat spreader extending from a stage on which a semiconductor chip is mounted. The heat spreader is located between a periphery of the stage and inner leads located opposite to the stage. The chip is electrically connected to the inner leads by an insulative film having a plurality of conductive patterns.
    Type: Grant
    Filed: August 12, 1987
    Date of Patent: February 28, 1989
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventor: Fumio Kuraishi