Abstract: According to one embodiment, a semiconductor integrated device which stores secret data and is capable of operating in a test mode in which a scan test with respect to an internal circuit is executed, the semiconductor integrated device comprises a mode signal receiving module configured to receive a scan mode signal designating the test mode, a mask module configured to mask the secret data when the mode signal receiving module receives the scan mode signal, and an error detection module configured to detect presence or absence of error in the secret data and to store detection result in a first flip-flop.

Abstract: According to one embodiment, an image processing device includes a plurality of parallax image generators. Each of the parallax image generators is configured to generate a first image and a second image based on an input image and a parameter for setting a distance between viewpoints. There is a first parallax between the first image and the second image. The first parallax depends on the parameter for setting the distance between viewpoints. The input image is inputted to the parallax image generators in common. A plurality of parameters for setting the distance between viewpoints different from each other are inputted to the parallax image generators, respectively.

Abstract: According to one embodiment, an image processing device includes a plurality of parallax image generators. Each of the parallax image generators is configured to generate a first image and a second image based on an input image and a parameter for setting a distance between viewpoints. There is a first parallax between the first image and the second image. The first parallax depends on the parameter for setting the distance between viewpoints. The input image is inputted to the parallax image generators in common. A plurality of parameters for setting the distance between viewpoints different from each other are inputted to the parallax image generators, respectively.

Abstract: According to one embodiment, an information processor includes a management module that manages a plurality of register areas in a host controller for processing data protected by copyright. The register areas store confidential information for copyright protection. The management module includes a use state management module and a release module. The use state management module manages use state information on whether the register areas are used by existing process tasks. When all the register areas are occupied by the existing process tasks and a new process task requests for the use of a register area to perform a process based on the confidential information, the release module releases a register area occupied by one of the existing process tasks according to the use state information to assign the register area to the new process task.

Abstract: An information processing device, comprising: a first encoder configured to encode data having an error detecting code in a first encoding format to generate first data; a second encoder configured to encode the first data in a second encoding format corresponding to decoding of the first encoding format to generate second data; and an error detector configured to perform error detection on the second data based on the error detecting code added to the data.

Abstract: According to one embodiment, a semiconductor integrated device which stores secret data and is capable of operating in a test mode in which a scan test with respect to an internal circuit is executed, the semiconductor integrated device comprises a mode signal receiving module configured to receive a scan mode signal designating the test mode, a mask module configured to mask the secret data when the mode signal receiving module receives the scan mode signal, and an error detection module configured to detect presence or absence of error in the secret data and to store detection result in a first flip-flop.

Abstract: An information processing device, comprising: a first encoder configured to encode data having an error detecting code in a first encoding format to generate first data; a second encoder configured to encode the first data in a second encoding format corresponding to decoding of the first encoding format to generate second data; and an error detector configured to perform error detection on the second data based on the error detecting code added to the data.