Abstract: A vertical layer stack including a bit-line-level dielectric layer and an etch stop dielectric layer can be formed over an array region. Bit-line trenches are formed through the vertical layer stack. Bit-line-trench fill structures are formed in the bit-line trenches. Each of the bit-line-trench fill structures includes a stack of a bit line and a capping dielectric strip. At least one via-level dielectric layer can be formed over the vertical layer stack. A bit-line-contact via cavity can be formed through the at least one via-level dielectric layer and one of the capping dielectric strips. A bit-line-contact via structure formed in the bit-line-contact via cavity includes a stepped bottom surface including a top surface of one of the bit lines, a sidewall segment of the etch stop dielectric layer, and a segment of a top surface of the etch stop dielectric layer.

Abstract: A superimposing video signal represents a superimposing shape. The superimposing video signal and a background video signal are mixed at a varible mixing rate. During an interval where the superimposing video signal corresponds to an edge of the superimposing shape, the mixing rate is varied. The superimposing video signal may be stored in a memory. The mixing rate may be varied in accordance with a mixing rate signal stored in a memory.

Abstract: A video signal discriminating apparatus comprises a pulse width measuring part for measuring a pulse width of a vertical or horizontal synchronizing pulse within a composite synchronizing signal of a video signal, a period measuring part for measuring a period of the synchronizing pulse having the pulse width thereof measured in the pulse width measuring part, and a discriminating part for discriminating that the video signal exists when the measured pulse width and the measured period are within respective predetermined ranges and for discriminating that no video signal exists when the measured pulse width and the measured period are outside the respective predetermined ranges.