Patents by Inventor Fumito Suzuki

Fumito Suzuki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6133617
    Abstract: Disclosed is a high breakdown voltage semiconductor device comprising a semiconductor substrate, an active layer consisting of a high resistivity semiconductor layer of a first conductivity type formed on the substrate with an insulating layer interposed therebetween, a first impurity region of the first conductivity type formed within the active layer, a second impurity region of a second conductivity type formed within the active layer, a third impurity region of the second conductivity type formed within the second impurity region and having a high impurity concentration, a first electrode being in ohmic contact with the first impurity region and the fourth impurity region, and a second electrode being in Schottky contact with the second impurity region and in ohmic contact with the third impurity region.
    Type: Grant
    Filed: September 10, 1999
    Date of Patent: October 17, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Keizo Hirayama, Hideyuki Funaki, Fumito Suzuki, Akio Nakagawa
  • Patent number: 5982015
    Abstract: Disclosed is a high breakdown voltage semiconductor device comprising a semiconductor substrate, an active layer consisting of a high resistivity semiconductor layer of a first conductivity type formed on the substrate with an insulating layer interposed therebetween, a first impurity region of the first conductivity type formed within the active layer, a second impurity region of a second conductivity type formed within the active layer, a third impurity region of the second conductivity type formed within the second impurity region and having a high impurity concentration, a first electrode being in ohmic contact with the first impurity region and the fourth impurity region, and a second electrode being in Schottky contact with the second impurity region and in ohmic contact with the third impurity region.
    Type: Grant
    Filed: February 17, 1999
    Date of Patent: November 9, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Keizo Hirayama, Hideyuki Funaki, Fumito Suzuki, Akio Nakagawa
  • Patent number: 5821031
    Abstract: Disclosed herein is a photosensitive solder resist ink capable of development with a dilute alkaline solution. It has a wide pre-curing latitude. It permits the pre-cured board to be stored for a long period of time. It is superior in resolution, sensitivity, and solder resistance. Disclosed also herein is a printed circuit board having good adhesion, chemical resistance, electrical properties, gold plating resistance, solder heat resistance, and electrocorrosion resistance. Disclosed also herein is a process for producing said printed circuit board by using said solder resist ink.The photosensitive solder resist ink comprises (A) an ultraviolet-curable resin containing 0-20 wt % of aromatic ring moiety which is obtained by reacting a polymer composed of (a) 40-100 mol % of ethylenically unsaturated monomer having an epoxy group and (b) 0-60 mol % of ethylenically unsaturated monomer capable of copolymerization therewith, with (meth)acrylic acid in an amount of 0.7-1.
    Type: Grant
    Filed: May 22, 1996
    Date of Patent: October 13, 1998
    Assignee: Goo Chemical Co., Ltd.
    Inventors: Soichi Hashimoto, Fumito Suzuki, Toshikazu Oda