Abstract: Protons are entered into a substrate to be analyzed at a proton incident angle larger than 0° and smaller 90°. Excited by the entered protons and emitted from the substrate to be analyzed, the characteristic X-ray is measured by an energy dispersive X-ray detector and the like. Impurity elements present in the substrate to be analyzed are identified based on the measured characteristic X-ray. The in-plane distribution in the substrate can be obtained by scanning the proton beam. The in-depth distribution can be obtained by entering protons at different proton incident angles. The elemental analysis method can be applied to semiconductor device manufacturing processes to analyze metal contamination or quantify a conductivity determining impurity element on an inline basis and with a high degree of accuracy.

Abstract: Protons are entered into a substrate to be analyzed at a proton incident angle larger than 0° and smaller 90°. Excited by the entered protons and emitted from the substrate to be analyzed, the characteristic X-ray is measured by an energy dispersive X-ray detector and the like. Impurity elements present in the substrate to be analyzed are identified based on the measured characteristic X-ray. The in-plane distribution in the substrate can be obtained by scanning the proton beam. The in-depth distribution can be obtained by entering protons at different proton incident angles. The elemental analysis method can be applied to semiconductor device manufacturing processes to analyze metal contamination or quantify a conductivity determining impurity element on an inline basis and with a high degree of accuracy.

Abstract: In this invention, a wafer is placed and kept in the low-temperature region at the bottom of a temperature space that is in a state of radiation equilibrium and that is formed inside chamber by a heating unit. The substrate temperature is gradually raised to a temperature ranging from 750° C. to 800° C. Next, the wafer is placed and kept in the high-temperature region in the temperature space and the substrate temperature is raised to the thermal processing temperature. Then thermal processing is performed for a specified period of time. By doing this, it is possible to perform uniform thermal processing without depending on the state of the wafer (ratio of an area covered by silicon nitride film or polysilicon film).

Abstract: In a method for fabricating an electronic device including a transistor with a drain extension structure, a correspondence between a size of a gate electrode of the transistor and ion implantation conditions or heat treatment conditions for forming the drain extension structure is previously obtained. This correspondence satisfies that the transistor has a given threshold voltage. After formation of the gate electrode and measurement of the size of the gate electrode, ion implantation conditions or heat treatment conditions for forming the drain extension structure are set based on the previously-obtained correspondence and the measured size of the gate electrode. Ion implantation or heat treatment for forming the drain extension structure is performed under the ion implantation conditions or heat treatment conditions that have been set.

Abstract: In a method for fabricating an electronic device including a transistor with a drain extension structure, a correspondence between a size of a gate electrode of the transistor and ion implantation conditions or heat treatment conditions for forming the drain extension structure is previously obtained. This correspondence satisfies that the transistor has a given threshold voltage. After formation of the gate electrode and measurement of the size of the gate electrode, ion implantation conditions or heat treatment conditions for forming the drain extension structure are set based on the previously-obtained correspondence and the measured size of the gate electrode. Ion implantation or heat treatment for forming the drain extension structure is performed under the ion implantation conditions or heat treatment conditions that have been set.

Abstract: In a method for fabricating an electronic device including a transistor with a drain extension structure, a correspondence between a size of a gate electrode of the transistor and ion implantation conditions or heat treatment conditions for forming the drain extension structure is previously obtained. This correspondence satisfies that the transistor has a given threshold voltage. After formation of the gate electrode and measurement of the size of the gate electrode, ion implantation conditions or heat treatment conditions for forming the drain extension structure are set based on the previously-obtained correspondence and the measured size of the gate electrode. Ion implantation or heat treatment for forming the drain extension structure is performed under the ion implantation conditions or heat treatment conditions that have been set.

Abstract: A light irradiation heat treatment apparatus and method may use a plane-shaped light irradiation heating component, facing one surface of a workpiece supported in a furnace, to raise the temperature of the workpiece. The temperature of the workpiece is raised by setting an intensity distribution for light irradiated from the light irradiation heating component in accordance with the resistivity of the workpiece. Thereafter, the workpiece is irradiated with light having the set light intensity distribution to raise its temperature.

Abstract: In this invention, a wafer is placed and kept in the low-temperature region at the bottom of a temperature space that is in a state of radiation equilibrium and that is formed inside chamber by a heating unit. The substrate temperature is gradually raised to 750 deg C. to 800 deg C. Next, the wafer is placed and kept in the high-temperature region in the temperature space and the substrate temperature is raised to the thermal processing temperature. Then thermal processing is performed for a specified period of time. By doing this, it is possible to perform uniform thermal processing without depending on the state of the wafer (ratio of an area covered by silicon nitride film or polysilicon film).

Abstract: When the emissivity ? on the reverse face of a substrate 10 is measured during annealing processing for the substrate 10, films made from a material that varies the emissivity ?, such as a first DPS film 15 used for forming a plug 15A, a second DPS film 17 used for forming a capacitor lower electrode 17A and a third DPS film 20 used for forming a capacitor upper electrode 20A, are formed on the top face of the substrate 10. On the other hand, no film made from a material that varies the emissivity ?, such as a DPS film, is formed on the reverse face of the substrate 10.

Abstract: In a method for fabricating an electronic device including a transistor with a drain extension structure, a correspondence between a size of a gate electrode of the transistor and ion implantation conditions or heat treatment conditions for forming the drain extension structure is previously obtained. This correspondence satisfies that the transistor has a given threshold voltage. After formation of the gate electrode and measurement of the size of the gate electrode, ion implantation conditions or heat treatment conditions for forming the drain extension structure are set based on the previously-obtained correspondence and the measured size of the gate electrode. Ion implantation or heat treatment for forming the drain extension structure is performed under the ion implantation conditions or heat treatment conditions that have been set.

Abstract: A distribution is given to a light irradiation intensity at a temperature rise process after starting a light irradiation (open loop control process), and temperature variation of the workpiece is reduced, so that thermal stress applied to a workpiece is reduced. A light irradiation heat treatment method for supporting a workpiece in a furnace, and heat-treating the workpiece by means of plane-shaped light irradiation heating means provided so as to face to one surface of the workpiece includes a process for irradiating a light having a flat intensity distribution to the workpiece from the light irradiation heating means and raising the temperature of the workpiece. In the open loop control process after starting the light irradiation, the temperature variation of the workpiece can be reduced by setting the light irradiation intensity for every plurality of areas.

Abstract: When the emissivity &egr; on the reverse face of a substrate 10 is measured during annealing processing for the substrate 10, films made from a material that varies the emissivity &egr;, such as a first DPS film 15 used for forming a plug 15A, a second DPS film 17 used for forming a capacitor lower electrode 17A and a third DPS film 20 used for forming a capacitor upper electrode 20A, are formed on the top face of the substrate 10. On the other hand, no film made from a material that varies the emissivity &egr;, such as a DPS film, is formed on the reverse face of the substrate 10.