Patents by Inventor Fumitoshi Yasuo

Fumitoshi Yasuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230243774
    Abstract: A cell signal measurement electrode plate includes a first transistor including a gate terminal connected to a first selection line and a source terminal connected to a second selection line, a second transistor including a gate terminal connected to a drain terminal of the first transistor, a source terminal connected to an electrode, and a drain terminal connected to a common wiring line, and a first capacitor including one capacitance electrode connected to the drain terminal of the first transistor and another capacitance electrode connected to a capacitance element potential fixing wiring line.
    Type: Application
    Filed: April 21, 2021
    Publication date: August 3, 2023
    Inventors: FUMITOSHI YASUO, KENICHI KITOH, TOMOKO TERANISHI, CHIHIRO TACHINO
  • Patent number: 11502408
    Abstract: A liquid crystal device includes a first substrate (TFT substrate) including a first dielectric substrate, a second substrate (slot substrate) including a second dielectric substrate, a liquid crystal layer provided between the first substrate and the second substrate and in all of an effective region and a portion of a non-effective region, a sealing seal portion configured to define the maximum value of the area of the liquid crystal layer when viewed from a normal direction of the first or second dielectric substrate, a cell gap control seal portion configured to define the minimum value of the thickness of the liquid crystal layer in the effective region, and a buffer portion provided in contact with the liquid crystal layer in the non-effective region and that deforms more easily due to external force than the first and second dielectric substrates in the effective region. The buffer portion includes a sheet and a joining section that joins the sheet and the first or second dielectric substrate.
    Type: Grant
    Filed: April 21, 2020
    Date of Patent: November 15, 2022
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Fumitoshi Yasuo, Kenichi Kitoh, Shinya Kadono, Junichi Inukai
  • Patent number: 11253856
    Abstract: Provided is a microfluidic device that, as compared with a conventional microfluidic device, (i) is smoother in surface of a water-repellent layer provided above a segment electrode and (ii) makes it easier for microfluid provided in the surface of the water-repellent layer to slide. A microfluidic device (1) includes: an array substrate (10) including a plurality of electrodes (14); and a counter substrate (40) including at least one electrode (42), the array substrate (10) and the counter substrate (40) having therebetween an internal space (50) in which to cause an electroconductive droplet (51) to move across the plurality of electrodes (14), and the plurality of electrodes (14) being provided on a first flattening resin layer (13) and each being a light-blocking metal electrode.
    Type: Grant
    Filed: September 15, 2017
    Date of Patent: February 22, 2022
    Assignee: Sharp Life Science (EU) Limited
    Inventors: Tomohiro Kosaka, Kenichi Kitoh, Takeshi Hara, Shinya Kadono, Fumitoshi Yasuo, Manabu Daio, Tomoko Teranishi, Hao Li
  • Patent number: 11081790
    Abstract: A scanning antenna includes a TFT substrate including a plurality of patch electrodes, a slot substrate including a slot electrode, and a liquid crystal layer provided between the TFT substrate and the slot substrate. The slot electrode includes a plurality of slots disposed corresponding to the plurality of patch electrodes and a solid portion not including the plurality of slot. When viewed from a normal direction of the substrate, the patch electrode is disposed across the slot in a first direction and overlaps the solid portion at both ends of the slot in each of a plurality of antenna units, and when viewed from the normal direction of the substrate, at least one of a periphery of the solid portion and a periphery of the patch electrode includes a recessed portion or a protruding portion in at least one antenna unit of the plurality of antenna units.
    Type: Grant
    Filed: March 10, 2017
    Date of Patent: August 3, 2021
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Fumitoshi Yasuo, Takeshi Hara, Shinya Kadono, Junichi Inukai, Tomohiro Kosaka
  • Patent number: 10873128
    Abstract: A TFT substrate includes a dielectric substrate and a plurality of antenna unit regions arranged on the dielectric substrate. Each of the plurality of antenna unit regions has a TFT and a patch electrode electrically connected to the drain electrode of the TFT. The patch electrode includes a first electrode layer formed of the same conductive film as the gate electrode of the TFT and a second electrode layer formed of the same conductive film as the source electrode of the TFT.
    Type: Grant
    Filed: November 15, 2018
    Date of Patent: December 22, 2020
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Kenichi Kitoh, Fumitoshi Yasuo, Shinya Kadono, Junichi Inukai, Juxian Li
  • Publication number: 20200343633
    Abstract: A liquid crystal device includes a first substrate (TFT substrate) including a first dielectric substrate, a second substrate (slot substrate) including a second dielectric substrate, a liquid crystal layer provided between the first substrate and the second substrate and in all of an effective region and a portion of a non-effective region, a sealing seal portion configured to define the maximum value of the area of the liquid crystal layer when viewed from a normal direction of the first or second dielectric substrate, a cell gap control seal portion configured to define the minimum value of the thickness of the liquid crystal layer in the effective region, and a buffer portion provided in contact with the liquid crystal layer in the non-effective region and that deforms more easily due to external force than the first and second dielectric substrates in the effective region. The buffer portion includes a sheet and a joining section that joins the sheet and the first or second dielectric substrate.
    Type: Application
    Filed: April 21, 2020
    Publication date: October 29, 2020
    Inventors: FUMITOSHI YASUO, KENICHI KITOH, SHINYA KADONO, JUNICHI INUKAI
  • Publication number: 20200295457
    Abstract: A scanning antenna includes a TFT substrate including a plurality of patch electrodes, a slot substrate including a slot electrode, and a liquid crystal layer provided between the TFT substrate and the slot substrate. The slot electrode includes a plurality of slots disposed corresponding to the plurality of patch electrodes and a solid portion not including the plurality of slot. When viewed from a normal direction of the substrate, the patch electrode is disposed across the slot in a first direction and overlaps the solid portion at both ends of the slot in each of a plurality of antenna units, and when viewed from the normal direction of the substrate, at least one of a periphery of the solid portion and a periphery of the patch electrode includes a recessed portion or a protruding portion in at least one antenna unit of the plurality of antenna units.
    Type: Application
    Filed: March 10, 2017
    Publication date: September 17, 2020
    Inventors: FUMITOSHI YASUO, TAKESHI HARA, SHINYA KADONO, JUNICHI INUKAI, TOMOHIRO KOSAKA
  • Patent number: 10637141
    Abstract: A scanning antenna including a transmission and/or reception region including a plurality of antenna units arranged in the transmission and/or reception region and a non-transmission and/or reception region includes a TFT substrate including a plurality of first TFTs supported by a first dielectric substrate and a plurality of patch electrodes, a slot substrate including a slot electrode including a plurality of slots, a liquid crystal layer provided between the TFT substrate and the slot substrate, and a plurality of inspection electrode sections disposed while not overlapping the plurality of antenna units when viewed from a normal direction of the first dielectric substrate.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: April 28, 2020
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Junichi Inukai, Takeshi Hara, Fumitoshi Yasuo, Tomohiro Kosaka, Shinya Kadono
  • Publication number: 20190148824
    Abstract: A TFT substrate includes a dielectric substrate and a plurality of antenna unit regions arranged on the dielectric substrate. Each of the plurality of antenna unit regions has a TFT and a patch electrode electrically connected to the drain electrode of the TFT. The patch electrode includes a first electrode layer formed of the same conductive film as the gate electrode of the TFT and a second electrode layer formed of the same conductive film as the source electrode of the TFT.
    Type: Application
    Filed: November 15, 2018
    Publication date: May 16, 2019
    Inventors: KENICHI KITOH, FUMITOSHI YASUO, SHINYA KADONO, JUNICHI INUKAI, JUXIAN LI
  • Publication number: 20190115660
    Abstract: A scanning antenna including a transmission and/or reception region including a plurality of antenna units arranged in the transmission and/or reception region and a non-transmission and/or reception region includes a TFT substrate including a plurality of first TFTs supported by a first dielectric substrate and a plurality of patch electrodes, a slot substrate including a slot electrode including a plurality of slots, a liquid crystal layer provided between the TFT substrate and the slot substrate, and a plurality of inspection electrode sections disposed while not overlapping the plurality of antenna units when viewed from a normal direction of the first dielectric substrate.
    Type: Application
    Filed: March 23, 2017
    Publication date: April 18, 2019
    Inventors: JUNICHI INUKAI, TAKESHI HARA, FUMITOSHI YASUO, TOMOHIRO KOSAKA, SHINYA KADONO
  • Publication number: 20180085756
    Abstract: Provided is a microfluidic device that, as compared with a conventional microfluidic device, (i) is smoother in surface of a water-repellent layer provided above a segment electrode and (ii) makes it easier for microfluid provided in the surface of the water-repellent layer to slide. A microfluidic device (1) includes: an array substrate (10) including a plurality of electrodes (14); and a counter substrate (40) including at least one electrode (42), the array substrate (10) and the counter substrate (40) having therebetween an internal space (50) in which to cause an electroconductive droplet (51) to move across the plurality of electrodes (14), and the plurality of electrodes (14) being provided on a first flattening resin layer (13) and each being a light-blocking metal electrode.
    Type: Application
    Filed: September 15, 2017
    Publication date: March 29, 2018
    Inventors: Tomohiro KOSAKA, Kenichi KITOH, Takeshi HARA, Shinya KADONO, Fumitoshi YASUO, Manabu DAIO, Tomoko TERANISHI, Hao Li
  • Patent number: 6326311
    Abstract: There is provided a microstructure producing method capable of achieving satisfactory uniformity and reproducibility of the growth position, size and density of a minute particle or thin line and materializing a semiconductor device which can reduce the cost through simple processes without using any special microfabrication technique and has superior characteristics appropriate for mass-production with high yield and high productivity as well as a semiconductor device employing the microstructure. An oxide film 12 having a region 12a of a great film thickness and a region 12b of a small film thickness are formed on the surface of a semiconductor substrate 11. Next, a microstructure that is a thin line 15 made of silicon Si is selectively formed only on the surface of the small-film-thickness region 12b of the oxide film 12.
    Type: Grant
    Filed: March 29, 1999
    Date of Patent: December 4, 2001
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tohru Ueda, Yasumori Fukushima, Fumitoshi Yasuo
  • Patent number: 6005248
    Abstract: A region on a surface side of a sample is irradiated with a Ga ion beam to form a first laminar portion having a thickness of 50-200 nm small enough to allow the transmission electron microscopic observation. While the sample is being heated within a transmission electron microscope, a process in which silicide is being formed is observed at the first laminar portion. Thereafter, a second laminar portion is formed in a thick region of the sample, similarly to the first laminar portion. Then, the first and second laminar portions are comparatively observed in a non-heated state with the transmission electron microscope. If observation results of the two laminar portions in the non-heated state are the same, a result of observing the first laminar portion during the heating is taken to represent a phenomenon in a bulk state.
    Type: Grant
    Filed: August 3, 1998
    Date of Patent: December 21, 1999
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kayoko Mori, Fumitoshi Yasuo, Akihiko Nakano
  • Patent number: 5352894
    Abstract: In an electron spectroscopy analyzer for obtaining an electron spectroscopy spectrum by applying to a sample an X-ray or electron beam from a first beam source and by analyzing the energy of secondary electrons emitted from the sample, an amount of energy shift of a reflected beam from the sample is obtained by applying a charging beam from second beam source, and a shift of the electron spectroscopy spectrum is corrected in accordance with the amount of energy shift. With this structure, a shift of a spectral line due to charges on the sample surface caused by the application of the X-ray or electron beam is corrected, thereby improving accuracy of the measurement of values and intensity of energy.
    Type: Grant
    Filed: September 20, 1993
    Date of Patent: October 4, 1994
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Fumitoshi Yasuo