Patents by Inventor Gérard Ducreux

Gérard Ducreux has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7321138
    Abstract: The invention concerns an asymmetric diac comprising a highly-doped substrate (21) of a first type of conductivity, a lightly-doped epitaxial layer (22) of the second type of conductivity on the upper surface of the substrate (21), a highly-doped region (24) of the first type of conductivity on the side of the upper surface of the epitaxial layer, a region (23) of the second type of conductivity more doped than the epitaxial layer beneath the region (24) of the first type of conductivity and not overlapping relative thereto, a channel retaining ring (25) of the second type of conductivity more doped than the epitaxial layer, outside the first region, and a wall (26) of the first type of conductivity outside said ring, joining the substrate.
    Type: Grant
    Filed: October 12, 2001
    Date of Patent: January 22, 2008
    Assignee: STMicroelectronics S.A.
    Inventor: Gérard Ducreux
  • Patent number: 7282750
    Abstract: A structure formed in a semiconductor substrate having at least one area having a high concentration of atoms of a metal such as platinum or gold, in which the area is surrounded with at least one first trench penetrating into the substrate.
    Type: Grant
    Filed: December 16, 2004
    Date of Patent: October 16, 2007
    Assignee: STMicroelectronics S.A.
    Inventor: Gérard Ducreux
  • Patent number: 7190006
    Abstract: The invention concerns at disc comprising a highly-doped substrate (20) of a first type of conductivity, a lightly-doped epitaxial layer (22) of the second type of conductivity including in the neighbourhood of the substrate (20) a more highly-doped part (21), a highly-doped region (24) of the first type of conductivity on the side of the upper surface of the epitaxial layer, a region (23) of the second type of conductivity more doped than the epitaxial layer beneath the region (24) of the first type of conductivity and not overlapping relative thereto, a channel retaining ring (25) of the second type of conductivity more highly doped than the epitaxial layer, outside the first region, a wall (26) of the first type of conductivity outside said ring, joining the substrate.
    Type: Grant
    Filed: October 12, 2001
    Date of Patent: March 13, 2007
    Assignee: STMicroelectronics S.A.
    Inventor: Gérard Ducreux
  • Publication number: 20050133887
    Abstract: A structure formed in a semiconductor substrate having at least one area having a high concentration of atoms of a metal such as platinum or gold, in which the area is surrounded with at least one first trench penetrating into the substrate.
    Type: Application
    Filed: December 16, 2004
    Publication date: June 23, 2005
    Applicant: STMicroelectronics, S.A.
    Inventor: Gerard Ducreux
  • Publication number: 20040021150
    Abstract: The invention concerns at diac comprising a highly-doped substrate (20) of a first type of conductivity, a lightly-doped epitaxial layer (22) of the second type of conductivity including in the neighbourhood of the substrate (20) a more highly-doped part (21), a highly-doped region (24) of the first type of conductivity on the side of the upper surface of the epitaxial layer, a region (23) of the second type of conductivity more doped than the epitaxial layer beneath the region (24) of the first type of conductivity and not overlapping relative thereto, a channel retaining ring (25) of the second type of conductivity more highly doped than the epitaxial layer, outside the first region, a wall (26) of the first type of conductivity outside said ring, joining the substrate.
    Type: Application
    Filed: August 18, 2003
    Publication date: February 5, 2004
    Inventor: Gerard Ducreux
  • Publication number: 20040012034
    Abstract: The invention concerns an asymmetric diac comprising a highly-doped substrate (21) of a first type of conductivity, a lightly-doped epitaxial layer (22) of the second type of conductivity on the upper surface of the substrate (21), a highly-doped region (24) of the first type of conductivity on the side of the upper surface of the epitaxial layer, a region (23) of the second type of conductivity more doped than the a epitaxial layer beneath the region (24) of the first type of conductivity and not overlapping relative thereto, a channel retaining ring (25) of the second type of conductivity more doped than the epitaxial layer, outside the first region, and a wall (26) of the first type of conductivity outside said ring, joining the substrate.
    Type: Application
    Filed: April 7, 2003
    Publication date: January 22, 2004
    Inventor: Gerard Ducreux
  • Patent number: 5281550
    Abstract: In a method for etching a deep groove in a silicon substrate, an oxide mask is delineated according to the shape of the desired groove. The photoresist which served to form the oxide mask is removed. A new photoresist layer is deposited and etched to define a photoresist mask overlapping the edges of the oxide mask. The wafer is immersed into a chemical bath for etching the silicon to form the desired groove, partially extending beneath the oxide mask. After rinsing, the wafter is immersed into a chemical bath for etching the silicon oxide to remove the oxide cap lying over the groove and a portion of the oxide layer projecting over the substrate beyond the edges of the groove.
    Type: Grant
    Filed: November 13, 1992
    Date of Patent: January 25, 1994
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventor: Gerard Ducreux