Abstract: An electronic device includes a semiconductor memory that includes: a variable resistance element formed over a substrate; and a carbon-containing aluminum nitride layer formed on sidewalls and in an upper portion of the variable resistance element.

Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a magnetoresistive element formed on a semiconductor substrate, a first contact plug which extends through an interlayer dielectric film formed on the semiconductor substrate and immediately below the magnetoresistive element, has a bottom surface in contact with an upper surface of the semiconductor substrate, and is adjacent to the magnetoresistive element, and an insulating film formed between the magnetoresistive element and the first contact plug and on the interlayer dielectric film, wherein the insulating film includes a first region positioned on a side of the interlayer dielectric film, and a second region positioned in the insulating film and on an upper surface of the first region, the insulating film is made of SiN, and the first region is a nitrogen rich film compared to the second region.

Abstract: An electronic device comprising a semiconductor memory unit includes: variable resistance patterns formed over a substrate; a protective layer formed over the substrate including the variable resistance patterns and including a leakage current blocking layer that is spaced apart from the variable resistance patterns; and contact plugs formed adjacent to the variable resistance patterns over the substrate and penetrating through the protective layer to be coupled with the substrate.

Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a magnetoresistive element formed on a semiconductor substrate, a first contact plug which extends through an interlayer dielectric film formed on the semiconductor substrate and immediately below the magnetoresistive element, has a bottom surface in contact with an upper surface of the semiconductor substrate, and is adjacent to the magnetoresistive element, and an insulating film formed between the magnetoresistive element and the first contact plug and on the interlayer dielectric film, wherein the insulating film includes a first region positioned on a side of the interlayer dielectric film, and a second region positioned in the insulating film and on an upper surface of the first region, the insulating film is made of SiN, and the first region is a nitrogen rich film compared to the second region.

Abstract: A method for manufacturing a semiconductor device includes forming plural layers of a MTJ device, depositing a conductive layer over the plural layers, forming a hard mask pattern used for patterning the plural layers over the conductive layer, where the conductive layer is exposed through the hard mask pattern, performing hydrogen peroxide process to volatilize the exposed conductive layer and removing the volatilized conductive layer, and patterning the plural layers by using the hard mask pattern as an etch mask to form the MTJ device.

Abstract: An electronic device includes a semiconductor memory, wherein the semiconductor memory includes a variable resistance element formed over a substrate, and a multi-layer passivation layer positioned over sidewalls of the variable resistance element and having two or more insulating layers formed over the sidewalls of the variable resistance element.

Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a magnetoresistive element formed on a semiconductor substrate, a first contact plug which extends through an interlayer dielectric film formed on the semiconductor substrate and immediately below the magnetoresistive element, has a bottom surface in contact with an upper surface of the semiconductor substrate, and is adjacent to the magnetoresistive element, and an insulating film formed between the magnetoresistive element and the first contact plug and on the interlayer dielectric film, wherein the insulating film includes a first region positioned on a side of the interlayer dielectric film, and a second region positioned in the insulating film and on an upper surface of the first region, the insulating film is made of SiN, and the first region is a nitrogen rich film compared to the second region.

Abstract: A method for fabricating a semiconductor memory device includes defining an active region having a shape protruding upward by forming a trench in a semiconductor substrate; forming an open region obtained by selectively exposing a lower side portion of the active region while forming a sidewall layer along the shape of the active region; covering the open region with a silicon layer; forming an impurity region in the lower side portion of the active region; forming a barrier metal layer on the silicon layer and the active region; forming a bit line metal layer buried in the entire active region; and forming a buried bit line having the barrier metal layer, the bit line metal layer and a silicide metal layer formed between the silicon layer and the barrier metal layer by etching the bit line metal layer up to a portion at which the impurity region is formed.

Abstract: A method for forming a tungsten film includes forming a tungsten nucleation layer having an amorphous-phase or a ?-phase over a semiconductor substrate. A first tungsten layer having a crystalline ?-phase is then formed over the tungsten nucleation layer to form a low resistivity tungsten film. A second tungsten layer is formed over the first tungsten layer by a physical vapor deposition process, and the second tungsten layer has a large grain size similar to that of the low resistivity tungsten film. The tungsten film has both good surface roughness and low resistivity, thus enhancing the production yield and reliability of a semiconductor device.

Abstract: A method for fabricating a semiconductor device includes: forming an MTJ element and an electrode layer pattern over a substrate; forming a protective layer to protect the MTJ element and the electrode layer pattern; forming at least one insulation layer over the protective layer; forming a first hole by selectively removing the at least one insulation layer; forming an overhang pattern protruding from the sidewall of the first hole; forming a second hole exposing the electrode layer pattern by selectively removing the at least one insulation layer exposed at the bottom of the first hole by using the overhang pattern as a mask; and forming a conductive layer pattern to be electrically coupled to the electrode layer pattern exposed through the second hole.

Abstract: A method for manufacturing a semiconductor device includes forming plural layers of a MTJ device, depositing a conductive layer over the plural layers, forming a hard mask pattern used for patterning the plural layers over the conductive layer, where the conductive layer is exposed through the hard mask pattern, performing hydrogen peroxide process to volatilize the exposed conductive layer and removing the volatilized conductive layer, and patterning the plural layers by using the hard mask pattern as an etch mask to form the MTJ device.

Abstract: A method for fabricating a semiconductor memory device includes defining an active region having a shape protruding upward by forming a trench in a semiconductor substrate; forming an open region obtained by selectively exposing a lower side portion of the active region while forming a sidewall layer along the shape of the active region; covering the open region with a silicon layer; forming an impurity region in the lower side portion of the active region; forming a barrier metal layer on the silicon layer and the active region; forming a bit line metal layer buried in the entire active region; and forming a buried bit line having the barrier metal layer, the bit line metal layer and a silicide metal layer formed between the silicon layer and the barrier metal layer by etching the bit line metal layer up to a portion at which the impurity region is formed.

Abstract: A method for forming a metal line of a semiconductor device includes forming an insulation layer having a contact hole over a semiconductor substrate. Any one of a TiN layer and a TaN layer is formed on the insulation layer, including a surface of the contact hole, and an anti-reflection layer is formed on any one of the TiN layer and the TaN layer. A trench is defined at an upper end of the contact hole by etching the anti-reflection layer, any one of the TiN layer and the TaN layer, and the insulation layer. Subsequently, the anti-reflection layer is removed and a metal layer is formed to fill the trench and the contact hole.

Abstract: A dual damascene method of forming a metal line of a semiconductor device includes the procedures of: forming, partially annealing, etching, and cleaning. The forming procedure includes forming an SOD (spin-on dielectric) layer on an insulation layer having a contact hole to fill the contact hole. The partially annealing procedure includes annealing the SOD layer to selectively bake portions of the SOD layer which are filled in an upper portion of the contact hole and placed on the insulation layer. The etching procedure includes etching the baked portions of the SOD layer and a portion of the insulation layer to define a trench. The cleaning procedure includes cleaning the resultant structure of the trench and to remove substantially all of the unbaked portion of the SOD layer which remains in a lower portion of the contact hole.

Abstract: A method for forming a tungsten film includes forming a tungsten nucleation layer having an amorphous-phase or a ?-phase over a semiconductor substrate. A first tungsten layer having a crystalline ?-phase is then formed over the tungsten nucleation layer to form a low resistivity tungsten film. A second tungsten layer is formed over the first tungsten layer by a physical vapor deposition process, and the second tungsten layer has a large grain size similar to that of the low resistivity tungsten film. The tungsten film has both good surface roughness and low resistivity, thus enhancing the production yield and reliability of a semiconductor device.