Patents by Inventor Gabriel Barna

Gabriel Barna has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • METHOD TO MANUFACTURE SILICON QUANTUM ISLANDS AND SINGLE-ELECTRON DEVICES
    Publication number: 20070007596
    Abstract: The present invention provides a method of manufacturing a single-electron transistor device (100). The method includes forming a thinned region (110) in a silicon substrate (105), the thinned region (110) offset by a non-selected region (115). The method also includes forming at least one quantum island (145) from the thinned region (110) by subjecting the thinned region (110) to an annealing process. The non-selected region (115) is aligned with the quantum island (145) and tunnel junctions (147) are formed between the quantum island (145) and the non-selected region (115). The present invention also includes a single-electron device (200), and a method of manufacturing an integrated circuit (300) that includes a single-electron device (305).
    Type: Application
    Filed: September 8, 2006
    Publication date: January 11, 2007
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Christoph Wasshuber, Gabriel Barna, Olivier Faynot
  • SOI wafer with cooling channels and a method of manufacture thereof
    Publication number: 20060160327
    Abstract: A method (100) of forming a silicon-on-insulator (SOI) wafer includes forming one or more channels in a top surface of a first wafer (104), and forming an insulator layer on a second wafer (106). The second wafer is treated (108) to generate a structural weakness therein, and the first and second wafers together (110) are then bonded together so that the channels face the insulator layer. A portion of the second wafer is then removed (112) from the bonded first and second wafers at a location corresponding to the structure weakness.
    Type: Application
    Filed: January 19, 2005
    Publication date: July 20, 2006
    Inventor: Gabriel Barna
  • Combined fully-depleted silicon-on-insulator (FD-SOI) and partially-depleted silicon-on-insulator (PD-SOI)devices
    Publication number: 20060128074
    Abstract: A method (100) of forming fully-depleted (90) and partially-depleted (92) silicon-on-insulator (SOI) devices on a single die in an integrated circuit device (2) is disclosed using SOI starting material (4, 6, 8) and a selective epitaxial growth process (110).
    Type: Application
    Filed: December 13, 2004
    Publication date: June 15, 2006
    Inventors: Howard Tigelaar, Gabriel Barna, Olivier Faynot
  • Method to manufacture silicon quantum islands and single-electron devices
    Publication number: 20050136655
    Abstract: The present invention provides a method of manufacturing a single-electron transistor device (100). The method includes forming a thinned region (110) in a silicon substrate (105), the thinned region (110) offset by a non-selected region (115). The method also includes forming at least one quantum island (145) from the thinned region (110) by subjecting the thinned region (110) to an annealing process. The non-selected region (115) is aligned with the quantum island (145) and tunnel junctions (147) are formed between the quantum island (145) and the non-selected region (115). The present invention also includes a single-electron device (200), and a method of manufacturing an integrated circuit (300) that includes a single-electron device (305).
    Type: Application
    Filed: December 19, 2003
    Publication date: June 23, 2005
    Applicant: Texas Instruments, Incorporated
    Inventors: Christoph Wasshuber, Gabriel Barna, Olivier Faynot