Abstract: A battery pack management system adjusts the relative state-of-charge of respective battery blocks in a battery pack to equalize (i.e., align, balance or otherwise make similar) the peak battery block voltages (i.e., maximum or “upper peak” battery block voltages when the battery pack is being charged and/or minimum or “lower peak” battery block voltages when the battery is being discharged). Upon detecting an anomalous battery block that exhibits outlier upper and lower peak voltages, the battery pack management system adjusts the relative state of charge of respective battery blocks to center their respective upper and lower peak voltages between operating limits, thus maximizing the operating margin of the battery pack as a whole.

Abstract: A method and apparatus for equalizing a reflection in a reflective high speed serial link. The method involves obtaining an amplitude and delay time of a compensating pulse that is transmitted in response to a pulse transmitted on the serial link. The apparatus comprises a programmable delay element and a driver stage configured to transmit a delayed and amplitude adjusted version of a pulse transmitted on the serial link. A method for equalizing a plurality of reflections in a reflective high speed serial link. The method involves obtaining an amplitude and delay time of a first compensating pulse and an amplitude and delay time of a second compensating pulse. The method further involves transmitting the first compensating and second compensating pulses in response to a pulse transmitted on the serial link.

Abstract: A method for operating a battery system having multiple battery packs. The method includes decoupling the output of a discharged battery pack from the vehicle load, reducing the voltage between an output of a charged battery pack and the vehicle load prior to coupling the output of the charged battery pack to the vehicle load.

Abstract: A method and apparatus for equalizing a reflection in a reflective high speed serial link. The method involves obtaining an amplitude and delay time of a compensating pulse that is transmitted in response to a pulse transmitted on the serial link. The apparatus comprises a programmable delay element and a driver stage configured to transmit a delayed and amplitude adjusted version of a pulse transmitted on the serial link. A method for equalizing a plurality of reflections in a reflective high speed serial link. The method involves obtaining an amplitude and delay time of a first compensating pulse and an amplitude and delay time of a second compensating pulse. The method further involves transmitting the first compensating and second compensating pulses in response to a pulse transmitted on the serial link.

Abstract: A memory system comprising memory modules including memory chips stacked with switching circuits. A memory controller coupled to the memory modules is configured to initiate memory accesses. When a stacked switching circuit detects the memory access, the switching circuit routes the access to another memory module if the access is not directed to a memory chip of the receiving memory module, or processes the access locally if the access is directed to a memory chip of the receiving memory module. The memory controller and memory modules are coupled via bi-directional serial links. Each memory module may include multiple stacked switching circuits, each of which may be coupled to fewer than all of the memory chips within the memory module. Switching circuits further include circuitry configured to de-serialize data prior to conveyance to a memory chip, and serialize data received from a DRAM chip prior to transmitting the received data.

Abstract: Improved clock and data recovery involves transmitting one or more null frames prior to transmitting a sync frame. A receiving component detects for the sync frame to lock to a data signal sent on a signal path by a transmitting component. The one or more null frames transmitted prior to the sync frame results in a settling of the signal path prior to reception of the sync frame, thereby lessening or removing the effects of previously sent data on the sync frame.

Abstract: In one embodiment, a ferroelectric material is processed by placing the material in an environment including metal vapor and heating the material to a temperature below the Curie temperature of the material. This allows the bulk conductivity of the ferroelectric material to be increased without substantially degrading its ferroelectric domain properties. In one embodiment, the ferroelectric material comprises lithium tantalate and the metal vapor comprises zinc.

Abstract: In one embodiment, a ferroelectric material is processed by placing the material in an environment including metal vapor and heating the material to a temperature below the Curie temperature of the material. This allows the bulk conductivity of the ferroelectric material to be increased without substantially degrading its ferroelectric domain properties. In one embodiment, the ferroelectric material comprises lithium tantalate and the metal vapor comprises zinc.

Abstract: In one embodiment, lithium oxide concentration in wafers is adjusted by placing the wafers in a vessel. Vapor of a lithium oxide source is provided and absorbed by the wafers, thereby adjusting the lithium oxide concentration in the wafers. In another embodiment, a two-phase lithium-rich source is placed between wafers such that space in the process chamber is efficiently utilized. In another embodiment, the wafers to be processed are placed in a section of a process chamber (e.g., process tube). Lithium oxide is introduced on end of the process chamber. Carrier gas is also introduced on that end of the process chamber to carry the lithium oxide into the section of the process chamber where the wafers are located. By adjusting the partial pressure of lithium oxide in the process chamber, the rate at which lithium oxide is absorbed by the wafers is controlled.

Abstract: A pendulum motor having a stator and a cantilever beam moveable by an electrostatic force to predetermined positions relative to a supporting structure. A micro electro mechanical system (MEMS) mechanism is formed on a semiconductor substrate using process steps that are completely compatible with current CMOS technology. A cantilever beam is fixed at one end to a structural layer and an electrode arrangement that provides an electrostatic field across a gap between the beam and a stator. A force between the beam and the stator generated by the electrostatic field results in movement of the free end of the beam relative to the stator. The free end of the beam may then be displaced by a predetermined amount from an equilibrium position and held in place by means of an applied electrostatic field. Movement of the free end of the beam is in a plane parallel to the surface of the support structure and it may follow either a circular or a non-circular path.