Abstract: The present subject matter facilitates chaining of multiple serial peripheral interface (SPI) compliant devices without requiring a bulky clock tree. Generally, in a serial clock distribution scheme as described herein, a fixed pulse based output cock (SCLK_OUT) is synchronized with the data output (SDO) from a respective device in the chain. The SCLK_OUT signal is connected to the SPI clock input (SCLK) of the following downstream device, and SDO is connected to the data input (SDI) of the respective downstream device. This allows the SCLK from the SPI master device to propagate through a theoretically unlimited count of devices in series. The master can resynchronize the MISO data from the SDO of the last part in the chain with the SCLK_OUT signal of the last device in the chain.

Abstract: A delta-sigma modulator circuit comprising: an integrator circuit configured to produce an integrator output signal that represents an integration of an analog input signal, a comparator output signal and a periodic signal; a comparator circuit configured to produce the comparator output signal in response to a comparison of the integrator output signal with a first reference signal; and a periodic signal generation circuit configured to produce the periodic signal.

Abstract: Isolators for providing electrical isolation between two circuits operating at different voltages are described, in which multiple semiconductor dies including the isolator components and the components of the two circuits are stacked on top of each other to provide a laterally-compact arrangement. An isolation barrier electrically separates the two circuits, and the isolator may provide a communication channel for transfer of information and/or power between the two circuits. The isolator may be included in an integrated device having a stacked die configuration where a first semiconductor die includes the isolator and components of the first of the two circuits, and a second semiconductor die positioned over the first semiconductor die includes components of the second of the two circuits. Two components of the isolator may be formed in separate layers of the first semiconductor die.

Abstract: Isolators for providing electrical isolation between two circuits operating at different voltages are described, in which multiple semiconductor dies including the isolator components and the components of the two circuits are stacked on top of each other to provide a laterally-compact arrangement. An isolation barrier electrically separates the two circuits, and the isolator may provide a communication channel for transfer of information and/or power between the two circuits. The isolator may be included in an integrated device having a stacked die configuration where a first semiconductor die includes the isolator and components of the first of the two circuits, and a second semiconductor die positioned over the first semiconductor die includes components of the second of the two circuits. Two components of the isolator may be formed in separate layers of the first semiconductor die.

Abstract: A soft start-up method is provided comprising: producing an initialization signal on a primary winding side of a transformer; using a comparison of the initialization signal with a signal having a value indicative of a current in the primary winding to control a switch operatively disposed between a voltage source and the primary side; transmitting the initialization signal over a galvanically isolating communication medium from the primary side to a secondary winding side of a transformer; at the secondary winding side, comparing a reference voltage signal with a secondary winding output voltage signal; in response to a match between the reference signal and the secondary winding output voltage signal, transmitting a comparison voltage signal over the galvanically isolating communication medium from the secondary side to the primary side; at the primary side, comparing the initialization signal with the transmitted comparison voltage signal; and in response to a match between the initialization signal the an

Abstract: A temperature sensing system can include first and second temperature sensing circuits and a digitizing encoder. The first and second temperature sensing circuits can include respective devices with semiconductor junction areas. Temperature information can be determined from one or more characteristic signals measured from the temperature sensing circuits. A feedback circuit can be configured to provide one or more offset signals to the digitizing encoder. The one or more offset signals can correspond to components or characteristics of the first and second temperature sensing circuits. In an example, at least one of the first and second temperature sensing circuits can include an adjustable load circuit for use with the other of the first and second temperature sensing circuits.

Abstract: A temperature sensing system can include first and second temperature sensing circuits and a digitizing encoder. The first and second temperature sensing circuits can include respective devices with semiconductor junction areas. Temperature information can be determined from one or more characteristic signals measured from the temperature sensing circuits. A feedback circuit can be configured to provide one or more offset signals to the digitizing encoder. The one or more offset signals can correspond to components or characteristics of the first and second temperature sensing circuits. In an example, at least one of the first and second temperature sensing circuits can include an adjustable load circuit for use with the other of the first and second temperature sensing circuits.

Abstract: A delta-sigma modulator circuit comprising: an integrator circuit configured to produce an integrator output signal that represents an integration of an analog input signal, a comparator output signal and a periodic signal; a comparator circuit configured to produce the comparator output signal in response to a comparison of the integrator output signal with a first reference signal; and a periodic signal generation circuit configured to produce the periodic signal.

Abstract: A soft start-up method is provided comprising: producing an initialization signal on a primary winding side of a transformer; using a comparison of the initialization signal with a signal having a value indicative of a current in the primary winding to control a switch operatively disposed between a voltage source and the primary side; transmitting the initialization signal over a galvanically isolating communication medium from the primary side to a secondary winding side of a transformer; at the secondary winding side, comparing a reference voltage signal with a secondary winding output voltage signal; in response to a match between the reference signal and the secondary winding output voltage signal, transmitting a comparison voltage signal over the galvanically isolating communication medium from the secondary side to the primary side; at the primary side, comparing the initialization signal with the transmitted comparison voltage signal; and in response to a match between the initialization signal the an

Abstract: A method for balancing an electrical parameter (e.g, a current or a voltage) between phases in a multi-phase interleaved circuit includes sensing the electrical parameter, demultiplexing the electrical parameter in accordance with a phase-select signal, sampling the demultiplexed components into a plurality of digital signals, generating an error signal based on a difference between the digital signals, and modulating the phase-select signal, as applied to the phases, in accordance with the error signal.

Abstract: Systems and methods can detect a relationship between portions of an analog input signal using a single sensing point, and can provide information about the detected relationship in a digital signal. A system can include an input transconductance stage, a gate circuit driven by a first control signal, a phase-select multiplexer circuit driven by a second control signal, and multiple analog-to-digital converter (ADC) channels. The ADC channels can include respective integrator circuits that receive information from the phase-select multiplexer circuit, and the ADC channels can include comparator circuits coupled to respective outputs of the integrator circuits. The outputs of the comparator circuits can be used as control signals for respective feedback multiplexers, or respective feedback current DACs, that selectively couple reference currents to the respective integrator circuit inputs. The feedback current DACs can be configured to continuously provide information to the respective integrator circuits.

Abstract: Systems and methods can detect a relationship between portions of an analog input signal using a single sensing point, and can provide information about the detected relationship in a digital signal. A system can include an input transconductance stage, a gate circuit driven by a first control signal, a phase-select multiplexer circuit driven by a second control signal, and multiple analog-to-digital converter (ADC) channels. The ADC channels can include respective integrator circuits that receive information from the phase-select multiplexer circuit, and the ADC channels can include comparator circuits coupled to respective outputs of the integrator circuits. The outputs of the comparator circuits can be used as control signals for respective feedback multiplexers, or respective feedback current DACs, that selectively couple reference currents to the respective integrator circuit inputs. The feedback current DACs can be configured to continuously provide information to the respective integrator circuits.

Abstract: A temperature sensing system can include first and second temperature sensing circuits and a digitizing encoder. The first and second temperature sensing circuits can include respective devices with semiconductor junction areas. Temperature information can be determined from one or more characteristic signals measured from the temperature sensing circuits. A feedback circuit can be configured to provide one or more offset signals to the digitizing encoder. The one or more offset signals can correspond to components or characteristics of the first and second temperature sensing circuits. In an example, at least one of the first and second temperature sensing circuits can include an adjustable load circuit for use with the other of the first and second temperature sensing circuits.

Abstract: A voltage reference is produced from PTAT, CTAT, and nonlinear current components generated in isolation from each other and combined to create the voltage reference.

Abstract: A voltage reference is produced from PTAT, CTAT, and nonlinear current components generated in isolation from each other and combined to create the voltage reference.

Abstract: A method for balancing an electrical parameter (e.g, a current or a voltage) between phases in a multi-phase interleaved circuit includes sensing the electrical parameter, demultiplexing the electrical parameter in accordance with a phase-select signal, sampling the demultiplexed components into a plurality of digital signals, generating an error signal based on a difference between the digital signals, and modulating the phase-select signal, as applied to the phases, in accordance with the error signal.

Abstract: A circuit for providing over-current protection, the circuit including a gate driver circuit for controlling a bridge circuit including a half bridge stage having high and low switches. The circuit includes a feedback loop circuit for counting over-current indicators sensed during one or more consecutive PWM cycles; wherein when an over-current indicator is sensed, the low switch is turned OFF for duration of a first time period after which the low switch is turned back ON, to enable determination of an over-current condition where false noise signals are rejected thereby preventing circuit shutdowns due to false over-current condition.

Abstract: A circuit for providing over-current protection, the circuit including a gate driver circuit for controlling a bridge circuit including a half bridge stage having high and low switches. The circuit includes a feedback loop circuit for counting over-current indicators sensed during one or more consecutive PWM cycles; wherein when an over-current indicator is sensed, the low switch is turned OFF for duration of a first time period after which the low switch is turned back ON, to enable determination of an over-current condition where false noise signals are rejected thereby preventing circuit shutdowns due to false over-current condition.